MBM29DL800TA-70 Meet Spansion Inc., MBM29DL800TA-70 Datasheet - Page 24

• Manufacturer Part Number: MBM29DL800TA-70
• Description: Flash Memory Cmos 8m 1m ? 8 / 512k ? 16 Bit
• Manufacturer: Meet Spansion Inc.

24
MB M29DL800TA
Write Operation Status
*1 : Successive reads from the erasing or erase-suspend sector cause DQ
*2 : Reading from non-erase suspend sector address indicates logic “1” at the DQ
In Progress
Exceeded
Time Limits
Detailed in “Hardware Sequence Flags Table” are all the status flags that can determine the status of the bank
for the current mode operation. The read operation from the bank where is not operate Embedded Algorithm
returns a data of memory cell. These bits offer a method for determining whether a Embedded Algorithm is
completed properly. The information on DQ
sector is consectively read, then the DQ
erasing sector is consectively read. This allows the user to determine which sectors are erasing and which are not.
The status flag is not output from bank (non-busy bank) not executing Embedded Algorithm. For example, there
is bank (busy bank) which is now executing Embedded Algorithm. When the read sequence is [1] <busy bank>,
[2] <non-busy bank>, [3] <busy bank>, the DQ
memory cell is outputted. In the erase-suspend read mode with the same read sequence, DQ
in the [1] and [3].
In the erase suspend read mode, DQ
outputted.
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
Status
-70/90
Retired Product DS05-20860-7E_August 6, 2007
Hardware Sequence Flags Table
2
is toggled in the [1] and [3]. In case of [2], the data of memory cell is
/MBM29DL800BA
2
bit will toggle. However, DQ
2
is address sensitive. This means that if an address from an erasing
6
is toggling in the case of [1] and [3]. In case of [2], the data of
2
will not toggle if an address from a non-
2
Data
DQ
DQ
DQ
DQ
DQ
to toggle.
0
1
0
7
7
7
7
7
-70/90
2
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
bit.
Data
DQ
1
6
Data Data
DQ
0
0
0
0
1
1
1
6
will not be toggled
5
DQ
0
1
0
0
0
1
0
3
Toggle*
Toggle
Data
DQ
N/A
N/A
1*
1
1
2
2
1