MBM29LV400TC-55PF Meet Spansion Inc., MBM29LV400TC-55PF Datasheet - Page 11

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MBM29LV400TC-55PF

Manufacturer Part Number
MBM29LV400TC-55PF
Description
Flash Memory Cmos 4m 512k ? 8/256k ? 16 Bit
Manufacturer
Meet Spansion Inc.
Datasheet
10
MBM29LV400TC
Notes:
Read/Reset
Read/Reset
Autoselect
Program
Chip Erase
Sector Erase
Sector Erase Suspend
Sector Erase Resume
Command
Sequence
Address bits A
Sector Address (SA)
Bus operations are defined in “MBM29LV400TC/400BC User Bus Operations Tables (BYTE = V
RA = Address of the memory location to be read
PA = Address of the memory location to be programmed
SA = Address of the sector to be erased. The combination of A
RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WE.
The system should generate the following address patterns:
Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
The command combinations not described in “MBM29LV400TC/400BC Standard Command Definitions
Table” and “MBM29LV400TC/BC Extended Command Definitions Table” in DEVICE BUS
BYTE = V
OPERATIONS are illegal.
Word
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
Byte
Addresses are latched on the falling edge of the WE pulse.
uniquely select any sector.
Word Mode: 555h or 2AAh to addresses A
Byte Mode: AAAh or 555h to addresses A
Cycles
Req’d
Write
Bus
IH
1
3
3
4
6
6
)” in DEVICE BUS OPERATIONS.
11
Erase can be suspended during sector erase with Addr. (“H” or “L”). Data (B0h)
Erase can be resumed after suspend with Addr. (“H” or “L”). Data (30h)
Write Cycle
Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data
XXXh
to A
555h
555h
555h
555h
555h
AAAh
AAAh
AAAh
AAAh
AAAh
First Bus
MBM29LV400TC/400BC Standard Command Definitions
17
= X = “H” or “L” for all address commands except or Program Address (PA) and
AAh
AAh
AAh
AAh
AAh
F0h
-55/70/90
Second Bus
Write Cycle
2AAh
2AAh
2AAh
2AAh
2AAh
555h
555h
555h
555h
555h
/MBM29LV400BC
55h
55h
55h
55h
55h
Write Cycle
555h
555h
555h
555h
555h
AAAh
AAAh
AAAh
AAAh
AAAh
Third Bus
–1
0
to A
and A
A0h
10
F0h
90h
80h
80h
0
to A
Fourth Bus
Read/Write
555h
AAAh
555h
AAAh
10
RA
PA
17
Cycle
, A
16
AAh
AAh
RD
PD
, A
15
, A
Write Cycle
2AAh
2AAh
555h
555h
-55/70/90
Fifth Bus
14
, A
13
, and A
55h
55h
Write Cycle
12
555h
AAAh
Sixth Bus
SA
will
IH
10h
30h
and

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