MX26L12811MC ETC-unknow, MX26L12811MC Datasheet - Page 6

• Manufacturer Part Number: MX26L12811MC
• Description: 128m [x8/x16] Single 3v Page Mode Mtp Memory
• Manufacturer: ETC-unknow

P/N:PM0990
FUNCTION
The device includes on-chip program/erase control cir-
cuitry. The Write State Machine (WSM) controls block
erase and word/page program operations. Operational
modes are selected by the commands written to the
Command User Interface (CUI). The Status Register in-
dicates the status of the WSM and when the WSM suc-
cessfully completes the desired program or block erase
operation.
READ
The device has three read modes, which accesses to
the memory array, the Device Identifier or the Status
Register. The appropriate read command are required to
be written to the CUI. Upon initial device powerup or af-
ter exit from powerdown, the device automatically re-
sets to read array mode. In the read array mode, low
level input to CE and OE, high level input to WE and
address signals to the address inputs (A22-A-1) output
the data of the addressed location to the data input/out-
put (Q15~Q0).
When reading information in read array mode, the de-
vice defaults to asynchronous page mode. In this state,
data is internally read and stored in a high-speed page
buffer. A2:0 addresses data in the page buffer. The page
size is 4 words or 8 bytes. Asynchronous word/byte mode
is supported with no additional commands required.
WRITE
Writes to the CUI enables reading of memory array data,
device identifiers and reading and clearing of the Status
Register. The CUI is written when the device is enable,
WE is active and OE is at high level. Address and data
are latched on the earlier rising edge of WE and CE.
Standard micro-processor write timings are used.
OUTPUT DISABLE
When OE is at VIH, output from the devices is disabled.
Data input/output are in a high-impedance(High-Z) state.
6
STANDBY
When CE disable the device (see table1) and place it in
standby mode. The power consumption of this device is
reduced. Data input/output are in a high-impedance(High-
Z) state. If the memory is deselected during block erase,
program or lock-bit configuration, the internal control cir-
cuits remain active and the device consume normal ac-
tive power until the operation completes.
MX26L12811MC
REV. 1.0, OCT. 29, 2003