MSC7116_08 Motorola Semiconductor Products, MSC7116_08 Datasheet - Page 39
MSC7116_08
Manufacturer Part Number
MSC7116_08
Description
Low-cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC
Manufacturer
Motorola Semiconductor Products
Datasheet
1.MSC7116_08.pdf
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2.5.13
Freescale Semiconductor
Note:
No.
700
701
702
703
704
705
706
707
708
709
710
711
712
TCK frequency of operation (1/(T
Note:
TCK cycle time
TCK clock pulse width measured at V
TCK rise and fall times
Boundary scan input data set-up time
Boundary scan input data hold time
TCK low to output data valid
TCK low to output high impedance
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO high impedance
TRST assert time
All timings apply to OCE module data transfers as the OCE module uses the JTAG port as an interface.
JTAG Signals
(Input)
TCK
T
frequency must less than 1/3 of the core frequency with an absolute
maximum limit of 40 MHz.
C
= 1/CLOCK which is the period of the core clock. The TCK
Characteristics
Figure 26. Test Clock Input Timing Diagram
703
C
× 3)
V
IH
M =
1.6 V
MSC7116 Data Sheet, Rev. 13
Table 31. JTAG Timing
V
IL
V
M
701
703
702
V
M
100.0
Min
25.0
11.0
14.0
14.0
0.0
0.0
5.0
0.0
0.0
5.0
0.0
0.0
All frequencies
Max
40.0
20.0
20.0
24.0
10.0
3.0
—
—
—
—
—
—
—
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
39
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