CD2231 Intel Corporation, CD2231 Datasheet - Page 95
CD2231
Manufacturer Part Number
CD2231
Description
CD2231 Intelligent Two-channel Lan And Wan Communications Controller
Manufacturer
Intel Corporation
Datasheet
1.CD2231.pdf
(178 pages)
- Current page: 95 of 178
- Download datasheet (3Mb)
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8.2.4.1
Datasheet
Register Name: COR3
Register Description: Channel Option Register 3
Default Value: x’00
Access: Byte Read/Write
Stop2
Bit 7
MNP 4 Mode
SLIP, MNP4, and Automatic In-Band Flow Control modes are only available on Revision B and
later devices.
Bit 7
Bit 6
Bit 5
Bit 4
Bits 3:0
FCSApd
Bit 6
Intelligent Two-Channel LAN and WAN Communications Controller — CD2231
Stop2
0 = 1 Stop bit
1 = 2 Stop bit
FCS append
0 = Receive CRC is not passed to the host at the end of the frame
1 = Receive CRC is passed to the host at the end of the frame
RxChk – Receive FCS check enabled
When clear, the channel does not test the 2-byte FCS field. All frame data characters
are given to the host.
When set, the channel tests the 2-byte FCS field.
TxGen – Transmit FCS enabled
When clear, the channel does not add the 2-byte FCS field.
When set, the channel adds the 2-byte FCS field at the end of the frame.
npad3, npad2, npad1, npad0 – Transmit frame leading pads
The number of character times preceding any frame transmission. A character time
is 10 bit times. All zeros in this field disables the leading pads.
RxChk
npad3
Bit 5
npad3
0
0
0
1
0
0
0
1
npad2
0
0
0
1
npad2
TxGen
Bit 4
0
0
0
1
npad1
0
0
1
1
npad1
npad3
Bit 3
0
0
1
1
npad0
0
1
0
1
npad0
0
1
0
1
npad2
Bit 2
leading pads
Number of
leading pads
15
0
1
2
Number of
Motorola Hex Address: x’16
15
npad1
0
1
2
Bit 1
Intel Hex Address: x’15
npad0
Bit 0
95
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