MB86291A Fujitsu Media Devices Limited, MB86291A Datasheet - Page 7

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MB86291A

Manufacturer Part Number
MB86291A
Description
Graphics Display Controller
Manufacturer
Fujitsu Media Devices Limited
Datasheet

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The HSYNC and VSYNC signals must be pulled up outside the LSI as they enter the input state upon reset.
Connect the ACOMPR, ACOMPG, and ACOMPB pins to the 0.1 F ceramic capacitor ahead of the analog
Terminate the AOUTR, AOUTG, and AOUTB pins with a resistance of 75 .
Input 1.1 V to the VREF pin. Between this pin and analog ground, insert a bypass capacitor (one with a
superior high-frequency characteristic such as a laminated ceramic capacitor).
power supply.
Connect the VRO pin to the analog ground with a 2.7 k resistor.
For noninterlaced display in external synchronization mode, input "0" to the EO pin, for example, using
a pull-down resistor.
The GV signal serves to switch between graphics and video for chroma keying. The pin outputs a low
level signal to select video.
MB86291A
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