MB86292 Fujitsu Media Devices Limited, MB86292 Datasheet - Page 8
MB86292
Manufacturer Part Number
MB86292
Description
Graphics Display Controller
Manufacturer
Fujitsu Media Devices Limited
Datasheet
1.MB86292.pdf
(25 pages)
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8
MB86292
Note : Immediately after turning the power supply on, input a pulse whose low level period is 500 ns or more to the
CLKSEL1 CLKSEL0
• Use the CLKSEL pin to select the input clock frequency for using the internal PLL with CKM
H
H
L
L
S pin before setting it to high level. After the S signal goes high, input the RESET signal at low level for 300
s or more.
CKM
H
L
H
H
L
L
Input 13.5 MHz.
Input 14.32 MHz.
Input 17.73 MHz.
Reserved
Select internal PLL output.
Select host CPU bus clock (BCLKI).
Input Clock Frequency
Clock Mode
Multiplier
15
14
11
202.5 MHz
200.48 MHz
195.03 MHz
Display reference
w w w . D a t a S h e e t
clock
L.
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