IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 333

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IDT82P2282

Manufacturer Part Number
IDT82P2282
Description
2 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2282
E1 PMON Interrupt Indication 1 (0C6H, 1C6H)
LCVOVI:
E1 TPLC / RPLC / PRGD Test Configuration (0C7H, 1C7H)
PRBSMODE[1:0]:
41~4FH & 51~5FH) is ignored.
41~4FH & 51~5FH).
bit (b6, E1-ID-41~4FH & 51~5FH).
PRBSDIR:
TESTEN:
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
= 0: The PMON indirect LCV Counter Mapping registers have not overflowed.
= 1: The PMON indirect LCV Counter Mapping registers have overflowed.
This bit will be cleared if a ’1’ is written to it.
These two bits select one mode to extract/replace the data for the PRBS Generator/Detector.
= 00: The unframed mode is selected. All 32 timeslots are extracted/replaced and the per-timeslot configuration in the TEST bit (b6, E1-ID-
= 01: The 8-bit-based mode is selected. The received data will only be extracted/replaced on the timeslot configured by the TEST bit (b6, E1-ID-
= 10: The 7-bit-based mode is selected. The received data will only be extracted/replaced on the 7 MSB of the timeslot configured by the TEST
= 11: Reserved.
= 0: The pattern in the PRBS Generator/Detector is generated in the transmit path and is detected in the receive path.
= 1: The pattern in the PRBS Generator/Detector is generated in the receive path and is detected in the transmit path.
A transition from ‘0’ to ‘1’ on this bit initiates the PRBS Generator/Detector.
7
7
6
6
Reserved
5
5
Reserved
4
4
322
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
PRBSMODE1
R/W
3
3
0
PRBSMODE0
R/W
2
2
0
PRBSDIR
R/W
1
1
0
October 7, 2003
TESTEN
LCVOVI
R/W
R
0
0
0
0

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