USB3280 SMSC Corporation, USB3280 Datasheet - Page 28

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USB3280

Manufacturer Part Number
USB3280
Description
Hi-Speed USB Device PHY
Manufacturer
SMSC Corporation
Datasheet

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Chapter 8 Application Notes
Revision 1.2 (10-27-06)
8.1
LS[1]
LINESTATE[1:0]
0
0
1
1
Linestate
The following sections consist of select functional explanations to aid in implementing the USB3280
into a system. For complete description and specifications consult the USB 2.0 Transceiver Macrocell
Interface Specification and Universal Serial Bus Specification Revision 2.0.
The voltage thresholds that the LINESTATE[1:0] signals use to reflect the state of DP and DM depend
on the state of XCVRSELECT. LINESTATE[1:0] uses HS thresholds when the HS transceiver is
enabled (XCVRSELECT = 0) and FS thresholds when the FS transceiver is enabled (XCVRSELECT
= 1). There is not a concept of variable single-ended thresholds in the USB 2.0 specification for HS
mode.
The HS receiver is used to detect Chirp J or K, where the output of the HS receiver is always qualified
with the Squelch signal. If squelched, the output of the HS receiver is ignored. In the USB3280, as
an alternative to using variable thresholds for the single-ended receivers, the following approach is
used.
In HS mode, 3ms of no USB activity (IDLE state) signals a reset. The SIE monitors LINESTATE[1:0]
for the IDLE state. To minimize transitions on LINESTATE[1:0] while in HS mode, the presence of
!Squelch is used to force LINESTATE[1:0] to a J state.
LS[0]
0
1
0
1
SE0
J
K
SE1
XCVRSELECT =1
TERMSELECT=1
FULL SPEED
Table 8.1 Linestate States
DATASHEET
28
STATE OF DP/DM LINES
Squelch
!Squelch
Invalid
Invalid
XCVRSELECT =0
TERMSELECT=0
HIGH SPEED
Hi-Speed USB Device PHY with UTMI Interface
Squelch
!Squelch &
HS Differential Receiver
Output
!Squelch &
!HS Differential Receiver
Output
Invalid
XCVRSELECT =0
TERMSELECT=1
CHIRP MODE
SMSC USB3280
Datasheet

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