USB3280 SMSC Corporation, USB3280 Datasheet - Page 37

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USB3280

Manufacturer Part Number
USB3280
Description
Hi-Speed USB Device PHY
Manufacturer
SMSC Corporation
Datasheet

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Hi-Speed USB Device PHY with UTMI Interface
Datasheet
SMSC USB3280
PARAMETER
TIMING
TERMSELECT
XCVRSELECT
T0
T1
T2
T3
T4
OPMODE 1
SUSPENDN
OPMODE 0
TXVALID
To detect the assertion of the downstream Chirp K's and Chirp J's for 2.5us {T
the appropriate LINESTATE signals asserted continuously for 165 CLKOUT cycles.
DP/DM
CLK60
time
Figure 8.6 HS Detection Handshake Timing Behavior from Suspend
While in suspend state an SE0 is detected on the USB. HS
Handshake begins. D+ pull-up enabled, HS terminations
disabled, SUSPENDN negated.
First transition of CLKOUT. CLKOUT "Usable" (frequency
accurate to ±10%, duty cycle accurate to 50±5).
Device asserts Chirp K on the bus.
Device removes Chirp K from the bus. (1 ms minimum width)
and begins looking for host chirps.
CLK "Nominal" (CLKOUT is frequency accurate to ±500
ppm, duty cycle accurate to 50±5).
Table 8.8 HS Detection Handshake Timing Values from Suspend
J
T0
SE0
DESCRIPTION
CLK power up time
DATASHEET
37
T1
T2
Device Chirp K
0 (HS Reset T0)
T0 < T1 < T0 + 5.6ms
T1 < T2 < T0 + 5.8ms
T2 + 1.0 ms < T3 <
T0 + 7.0 ms
T1 < T3 < T0 + 20.0ms
T3
T4
Look for host chirps
FILT
Revision 1.2 (10-27-06)
VALUE
}, the SIE must see

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