L64767 LSI Logic Corporation, L64767 Datasheet - Page 14

• Manufacturer Part Number: L64767
• Description: Smatv Qam Encoder
• Manufacturer: LSI Logic Corporation

Control Signals
14
SYNCOK
This section describes the control signals for the L64767.
OCLK
PLL_OUT_CS PLL Current Source
PLL_OUT_EX PLL Phase Sensitive EXOR Comparator
PLL_OUT_LO PLL Phase Sensitive Lock Detector
RESET
L64767 SMATV QAM Encoder
SYNC Detection/Phase Monitoring
In internal sync mode, when this signal is HIGH, it
indicates a correct lock to the input sync sequence, and
the number of track steps required for synchronization is
fulfilled. If synchronization is forced by FSTARTIN pulses,
SYNCOK is constantly LOW.
Output Processing Clock
This is a positive edge-triggered clock signal. The L64767
internally processes data (through the scrambler,
interleaver, and Reed-Solomon encoder) based on a
fraction of OCLK. Data outputs (I, Q, FSTARTOUT) are
referenced to OCLK. OCLK is independent of ICLK.
This signal is a 4.5-mA charge pump output from the
phase/frequency detector. The comparator is frequency-
and phase-sensitive. This signal is normally 3-state Z
level, and drives positive and negative current as
required. Depending on the configuration, the current
source can be inverted.
This signal is the output from the EXOR phase comparator.
This signal is the output from the PLL lock detector.
Reset
This is a level-sensitive data signal. It resets all internal
data paths. Reset timing is asynchronous to the device
clocks and does not interfere with the active clock edges
of ICLK and OCLK for reproducible output values. Reset
affects all the configuration registers and filter coefficients,
which must be downloaded again after reset.
Output
Output
Output
Output
Input
Input