AD9850 Analog Devices, AD9850 Datasheet - Page 5

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AD9850

Manufacturer Part Number
AD9850
Description
CMOS/ 125 MHz Complete DDS Synthesizer
Manufacturer
Analog Devices
Datasheet

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Pin
No.
4–1,
28–25
5, 24
6, 23
7
8
9
10, 19
11, 18
12
13
14
15
16
17
20
21
22
REV. E
Mnemonic
D0–D7
DGND
DVDD
W_CLK
FQ_UD
CLKIN
AGND
AVDD
R
QOUTB
QOUT
VINN
VINP
DACBL (NC) DAC Baseline. This is the DAC baseline voltage reference; this lead is internally bypassed and should
IOUTB
IOUT
RESET
SET
Function
8-Bit Data Input. This is the 8-bit data port for iteratively loading the 32-bit frequency and 8-bit phase/
control word. D7 = MSB; D0 = LSB. D7 (Pin 25) also serves as the input pin for the 40-bit serial data word.
Digital Ground. These are the ground return leads for the digital circuitry.
Supply Voltage Leads for digital circuitry.
Word Load Clock. This clock is used to load the parallel or serial frequency/phase/control words.
Frequency Update. On the rising edge of this clock, the DDS will update to the frequency (or phase)
loaded in the data input register, it then resets the pointer to Word 0.
Reference Clock Input. This may be a continuous CMOS-level pulse train or sine input biased at
1/2 V supply. The rising edge of this clock initiates operation.
Analog Ground. These leads are the ground return for the analog circuitry (DAC and comparator).
Supply Voltage for the analog circuitry (DAC and comparator).
This is the DAC’s external R
normal applications (F
relationship is: I
Output Complement. This is the comparator’s complement output.
Output True. This is the comparator’s true output.
Inverting Voltage Input. This is the comparator’s negative input.
Noninverting Voltage Input. This is the comparator’s positive input.
normally be considered a “no connect” for optimum performance.
The Complementary Analog Output of the DAC.
Analog Current Output of the DAC.
Reset. This is the master reset function; when set high it clears all registers (except the input register) and
the DAC output will go to Cosine 0 after additional clock cycles—see Figure 19.
OUT
= 32 (1.248 V/R
Table I. Lead Function Descriptions
S
I
OUT
LSB D0
W CLK
QOUTB
PIN CONFIGURATIONS
FQ UD
CLKIN
DGND
AGND
QOUT
DVDD
AVDD
R
SET
= 10 mA), the value for R
SET
D3
D2
D1
connection. This resistor value sets the DAC full-scale output current. For
10
11
12
13
14
NC = NO CONNECT
1
2
3
4
5
6
7
8
9
(Not to Scale)
SET
AD9850
TOP VIEW
–5–
).
28
27
26
25
24
22
23
21
20
19
18
17
16
15
D4
D5
D6
D7 MSB/SERIAL LOAD
DGND
DVDD
RESET
IOUT
IOUTB
AGND
AVDD
DACBL (NC)
VINP
VINN
SET
is 3.9 kΩ connected to ground. The R
AD9850
SET
/I
OUT

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