AD9851 Analog Devices, AD9851 Datasheet - Page 7

• Manufacturer Part Number: AD9851
• Description: CMOS 180 MHz DDS/DAC Synthesizer
• Manufacturer: Analog Devices

Figure 7. Application Showing Synchronization of Two
AD9851 DDSs to Form a Quadrature Oscillator
After a common RESET command is issued, separate W_CLKs
allow independent programming of each AD9851 40-bit input
register via the 8-bit data bus or serial input pin. A common
FQ_UD pulse is issued after programming is completed to
simultaneously engage both oscillators at their specified fre-
quency and phase.
Figure 8. Deriving a High Frequency Output Signal from
the AD9851 by Using an “Alias” or Image Signal
REV. C
MICROCONTROLLER
MICROPROCESSOR
AD9851
CLOCK
30MHz
FUNDAMENTAL
W CLK #1
W CLK #2
6
OR
FREQUENCY – MHz
60
SPECTRUM
AD9851
F
IMAGE
IOUT
FQ UD
RESET
C
120
– F
W CLK #1
W CLK #2
O
F
180
CLK
GENERATOR
e.g., DG-2020
8-BIT DATA BUS
DATA
FQ UD
RESET
F
IMAGE
C
240
+ F
50
O
BANDPASS
Figure 10. The AD9851 R
FILTER
10 BITS
FREQUENCY – MHz
50
+5V
10-BIT DAC
–5V
RESET
FQ UD
W CLK
W CLK
FQ UD
RESET
FINAL OUTPUT
AD9731
SPECTRUM
AD9851
AD9851
CLOCK
AMPLIFIER
REF
#1
#2
IOUT
IOUT
F
IMAGE
C
240
20mA
MAX
+ F
DIFFERENCE
O
BANDPASS
FILTER
PHASE
125MHz
240MHz
SET
+5V
90
330
200
Input Being Driven by an External DAC
–7–
4k
Differential DAC output connection (Figure 9) for reduction of
common-mode signals and to allow highly reactive filters to be
driven without a filter input termination resistor (see above
single-ended example, Figure 8). A 6 dB power advantage is
obtained at the filter output as compared with the single-ended
example, since the filter need not be doubly terminated.
Figure 9. Differential DAC Output Connection for Reduc-
tion of Common-Mode Signals
The AD9851 R
(Figure 10) to provide amplitude modulation or fixed, digital
amplitude control of the DAC output current. Full description
of this application is found as a “Technical Note” on the AD9851
web page (site address is www.analog.com) under “Related
Information.” An Analog Devices application note for the
AD9850, AN-423, describes another method of amplitude
control using an enhancement-mode MOSFET that is equally
applicable to the AD9851.
NOTE: If the 6 REFCLK Multiplier of the AD9851 is en-
gaged, the 125 MHz clocking source shown in Figure 10 can be
reduced by a factor of six.
12
9
REFERENCE
R
SET
CLOCK
COMPUTER
AD9851
+5V
DDS
CONTROL
DATA
AD9851
IOUT
IOUT
SET
DDS
input being driven by an external DAC
21
20
TRANSFORMER-COUPLED
20
21
TRANSFORMER-COUPLED
i.e., MINI-CIRCUITS T1–1T
1:1 TRANSFORMER
DIFFERENTIAL
1:1 TRANSFORMER
DIFFERENTIAL
OUTPUT
50
OUTPUT
50
50
FILTER
AD9851
50