AD9927 Analog Devices, AD9927 Datasheet - Page 28
AD9927
Manufacturer Part Number
AD9927
Description
14-Bit CCD Signal Processor
Manufacturer
Analog Devices
Datasheet
1.AD9927.pdf
(100 pages)
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AD9927
VERTICAL TIMING GENERATION
The AD9927 provides a flexible solution for generating vertical
CCD timing and can support multiple CCDs and different
system architectures. The vertical transfer clocks are used to
shift each line of pixels into the horizontal output register of the
CCD. The AD9927 allows these outputs to be individually
programmed into various readout configurations by using a
4-step process.
Figure 34 shows an overview of how the vertical timing is
generated in four steps.
1. The individual pulse patterns for XV1 to XV24 are created by
using the vertical pattern group registers.
Rev. 0 | Page 28 of 100
2. The V-pattern groups are used to build the sequences, which
3. The readout for an entire field is constructed by dividing the
4. The MODE registers allow the different fields to be combined
is where additional information is added.
field into different regions and then assigning a sequence to
each region. Each field can contain up to nine different regions
to accommodate different steps of the readout, such as high
speed line shifts and unique vertical line transfers. The total
number of V-patterns, V-sequences, and fields is programmable,
but limited by the number of registers.
in any order for various readout configurations.
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