AD9948 Analog Devices, AD9948 Datasheet - Page 16

no-image

AD9948

Manufacturer Part Number
AD9948
Description
10-Bit CCD Signal Processor with Precision Timing Core
Manufacturer
Analog Devices
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9948AKCPZRL
Manufacturer:
SMSC
Quantity:
9 800
Part Number:
AD9948AKCPZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9948KCP
Manufacturer:
AD
Quantity:
220
Part Number:
AD9948KCP
Manufacturer:
ADI
Quantity:
210
Part Number:
AD9948KCPZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9948KCPZRL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD9948
HORIZONTAL CLAMPING AND BLANKING
The AD9948’s horizontal clamping and blanking pulses are
fully programmable to suit a variety of applications. Individual
sequences are defined for each signal, which are then organized
into multiple regions during image readout. This allows the dark
pixel clamping and blanking patterns to be changed at each
stage of the readout to accommodate different image transfer
timing and high speed line shifts.
Individual CLPOB and PBLK Sequences
The AFE horizontal timing consists of CLPOB and PBLK, as
shown in Figure 8. These two signals are independently pro-
grammed using the parameters shown in Table XII. The start
polarity, first toggle position, and second toggle position are
Parameter
Polarity
Toggle Position 1
Toggle Position 2
Parameter
HBLKMASK
Toggle Position 1
Toggle Position 2
Toggle Position 3
Toggle Position 4
Toggle Position 5
Toggle Position 6
CLPOB
HBLK
PBLK
HD
HD
PROGRAMMABLE SETTINGS:
1. FIRST TOGGLE POSITION = START OF BLANKING
2. SECOND TOGGLE POSITION = END OF BLANKING
(1)
PROGRAMMABLE SETTINGS:
1. START POLARITY (CLAMP AND BLANK REGION ARE ACTIVE LOW)
2. FIRST TOGGLE POSITION
3. SECOND TOGGLE POSITION
1b
Length
12b
12b
Length
1b
12b
12b
12b
12b
12b
12b
(1)
(2)
BLANK
ACTIVE
Table XII. CLPOB and PBLK Individual Sequence Parameters
Range
High/Low
0–4095 Pixel Location
0–4095 Pixel Location
Range
High/Low
0–4095 Pixel Location
0–4095 Pixel Location
0–4095 Pixel Location
0–4095 Pixel Location
0–4095 Pixel Location
0–4095 Pixel Location
Figure 9. Horizontal Blanking (HBLK) Pulse Placement
(2)
(3)
Table XIII. HBLK Individual Sequence Parameters
Figure 8. Clamp and Preblank Pulse Placement
Description
Starting Polarity of Clamp and PBLK Pulses for Sequences 0–3.
First Toggle Position within the Line for Sequences 0–3.
Second Toggle Position within the Line for Sequences 0–3.
Description
Masking Polarity for H1 for Sequences 0–3 (0 = H1 Low, 1 = H1 High).
First Toggle Position within the Line for Sequences 0–3.
Second Toggle Position within the Line for Sequences 0–3.
Third Toggle Position within the Line for Sequences 0–3.
Fourth Toggle Position within the Line for Sequences 0–3.
Fifth Toggle Position within the Line for Sequences 0–3.
Sixth Toggle Position within the Line for Sequences 0–3.
–16–
fully programmable for each signal. The CLPOB and PBLK
signals are active low, and should be programmed accordingly.
Up to four individual sequences can be created for each signal.
Individual HBLK Sequences
The HBLK programmable timing shown in Figure 9 is similar
to CLPOB and PBLK. However, there is no start polarity con-
trol. Only the toggle positions are used to designate the start and
the stop positions of the blanking period. Additionally, there is a
polarity control, HBLKMASK, which designates the polarity of
the horizontal clock signals H1–H4 during the blanking period.
Setting HBLKMASK high will set H1 = H3 = low and H2 =
H4 = high during the blanking, as shown in Figure 10. Up to
four individual sequences are available for HBLK.
BLANK
ACTIVE
. . .
. . .
. . .
. . .
REV. 0

Related parts for AD9948