AD9948 Analog Devices, AD9948 Datasheet - Page 5

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AD9948

Manufacturer Part Number
AD9948
Description
10-Bit CCD Signal Processor with Precision Timing Core
Manufacturer
Analog Devices
Datasheet

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REV. 0
Pin No.
2–4
5
6
7–13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
1, 40
*Type: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.
Mnemonic
D0–D2
DRVSS
DRVDD
D3–D9
H1
H2
HVSS
HVDD
H3
H4
RGVSS
RG
RGVDD
TCVSS
TCVDD
CLI
AVDD
CCDIN
AVSS
REFT
REFB
SL
SDI
SCK
VD
HD
DVSS
DVDD
HBLK
CLP/PBLK
NC
(LSB) D0
DRVDD
DRVSS
Type*
DO
P
P
DO
DO
DO
P
P
DO
DO
P
DO
P
P
P
DI
P
AI
P
AO
AO
DI
DI
DI
DI
DI
P
P
DI
DO
NC
D1
D2
D3
D4
D5
D6 10
PIN FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
PIN CONFIGURATION
PIN 1
IDENTIFIER
Description
Data Outputs (D0 is LSB)
Digital Driver Ground
Digital Driver Supply
Data Outputs (D9 is MSB)
CCD Horizontal Clock 1
CCD Horizontal Clock 2
H1–H4 Driver Ground
H1–H4 Driver Supply
CCD Horizontal Clock 3
CCD Horizontal Clock 4
RG Driver Ground
CCD Reset Gate Clock
RG Driver Supply
Analog Ground for Timing Core
Analog Supply for Timing Core
Master Clock Input
Analog Supply for AFE
Analog Input for CCD Signal (Connect through Series 0.1 µF Capacitor)
Analog Ground for AFE
Reference Top Decoupling (Decouple with 1.0 µF to AVSS)
Reference Bottom Decoupling (Decouple with 1.0 µF to AVSS)
3-Wire Serial Load
3-Wire Serial Data Input
3-Wire Serial Clock
Vertical Sync Pulse
Horizontal Sync Pulse
Digital Ground
Digital Supply
Optional HBLK Input
CLPOB or PBLK Output
Not Internally Connected
TOP VIEW
AD9948
–5–
30
29
28
27
26
25
24
23
22
21
REFB
REFT
AVSS
CCDIN
AVDD
CLI
TCVDD
TCVSS
RGVDD
RG
AD9948

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