MAX108 Maxim, MAX108 Datasheet - Page 12

• Manufacturer Part Number: MAX108
• Description: 5V / 1.5Gsps / 8-Bit ADC with On-Chip 2.2GHz Track/Hold Amplifier
• Manufacturer: Maxim

±5V, 1.5Gsps, 8-Bit ADC with
On-Chip 2.2GHz Track/Hold Amplifier
Figure 1. Simplified Functional Diagram
The MAX108 is an 8-bit, 1.5Gsps flash analog-to-digital
converter (ADC) with on-chip T/H amplifier and differ-
ential PECL-compatible outputs. The ADC (Figure 1)
employs a fully differential 8-bit quantizer and a unique
encoding scheme to limit metastable states, with no
error exceeding 1LSB max.
An integrated 8:16 output demultiplexer simplifies inter-
facing to the part by reducing the output data rate to
one-half the sampling clock rate. This demultiplexer
12
_______________Detailed Description
CLKCOM
VOSADJ
RSTIN+
RSTIN-
CLK+
______________________________________________________________________________________
CLK-
VIN+
VIN-
50
50
50
50
GNDI
GNDI
REFERENCE
BANDGAP
INPUT DUAL LATCH
T/H
CLOCK
DRIVER
BIAS CURRENTS
RESET
T/H AMPLIFIER
OUT
+2.5V
REF
GNDR
REF
IN
ADC
CLOCK
DRIVER
REFERENCE
AMPLIFIER
PIPELINE
RESET
LOGIC
CLOCK
DRIVER
FLASH ADC
8-BIT
DELAYED
RESET
MAX108
has internal reset capability that allows multiple
MAX108s to be time-interleaved to achieve higher
effective sampling rates.
When clocked at 1.5Gsps, the MAX108 provides a typi-
cal ENOB of 7.5 bits at an analog input frequency of
750MHz. The analog input of the MAX108 is designed
for differential or single-ended use with a ±250mV full-
scale input range. In addition, this fast ADC features an
on-chip +2.5V precision bandgap reference. If desired,
an external reference can also be used.
DEMUXEN DIVSELECT
GENERATOR
DEMUX
CLOCK
16
2
DEMUX
CLOCK
DRIVER
RESET OUTPUT
READY CLOCK
OVERRANGE
DATA PORT
DATA PORT
AUXILIARY
PRIMARY
DEMUX
DATA
BIT
16
16
2
2
2
PECL OUTPUTS
DIFFERENTIAL
OR
A0–A7
P0–P7
DREADY
RSTOUT