MAX108 Maxim, MAX108 Datasheet - Page 16

• Manufacturer Part Number: MAX108
• Description: 5V / 1.5Gsps / 8-Bit ADC with On-Chip 2.2GHz Track/Hold Amplifier
• Manufacturer: Maxim

The MAX108 also offers a special decimated, demulti-
plexed output (Figure 8) that discards every other input
sample and outputs data at one-quarter the input sam-
pling rate for system debugging at slower output data
rates. With an input clock of 1.5GHz, the effective output
data rate will be reduced to 375MHz per output port in
the DIV4 mode (Table 2). Since every other sample is
discarded, the effective sampling rate is 750Msps.
A single differential PECL overrange output bit (OR+,
OR-) is provided for both primary and auxiliary demulti-
plexed outputs. The operation of the overrange bit
depends on the status of the internal demultiplexer. In
demultiplexed DIV2 mode and decimation DIV4 mode,
±5V, 1.5Gsps, 8-Bit ADC with
On-Chip 2.2GHz Track/Hold Amplifier
Figure 8. Decimation DIV4-Mode Timing Diagram
Table 2. Demultiplexer Operation
X = Don’t care
16
DATA PORT
DATA PORT
AUXILIARY
______________________________________________________________________________________
PRIMARY
DREADY
NOTE: THE LATENCY TO THE PRIMARY PORT REMAINS 7.5 CLOCK CYCLES, WHILE THE LATENCY OF THE AUXILIARY PORT INCREASES TO 9.5 CLOCK CYCLES.
DEMUXEN
DREADY+
CLK
DREADY-
High
High
CLK+
CLK-
Low
THIS EFFECTIVELY DISCARDS EVERY OTHER SAMPLE AND REDUCES THE OUTPUT DATA RATE TO 1/4 THE SAMPLE CLOCK RATE.
n
ADC SAMPLE NUMBER
n+1
n+2
Overrange Operation
DIVSELECT
Decimation DIV4 Mode
High
Low
n+3
X
n+4
ADC SAMPLES ON THE RISING EDGE OF CLK+
n+5
DEMUX MODE
750Msps (max)
750Msps/port
375Msps/port
n+6
DIV1
DIV2
DIV4
the OR bit will flag an overrange condition if either the
primary or auxiliary port contains an overranged sam-
ple (Table 2). In non-demultiplexed DIV1 mode, the OR
port will flag an overrange condition only when the pri-
mary output port contains an overranged sample.
The MAX108 T/H amplifier is designed to work at full
speed for both single-ended and differential analog
inputs (Figure 9). Inputs VIN+ and VIN- feature on-chip,
laser-trimmed 50Ω termination resistors to provide
excellent voltage standing-wave ratio (VSWR) perfor-
mance.
n+7
n+8
Applications Information
n+9
Flags overrange data appearing in primary
port only.
Flags overrange data appearing in either
the primary or auxiliary port.
n-2
Single-Ended Analog Inputs
n
OVERRANGE BIT OPERATION
n+10
n+11
n+12
n+2
n+4
n+13