MAX1359B Maxim Integrated Products, MAX1359B Datasheet - Page 50

• Manufacturer Part Number: MAX1359B
• Description: Data-Acquisition System
• Manufacturer: Maxim Integrated Products

DataSheet.in
16-Bit, Data-Acquisition System with ADC, DAC,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
Table 16. UPIO Mode Configuration
Note: When multiple UPIO inputs are configured for the same input function, the inputs are OR’ed together.
50
UP4MD<3:0>, UP3MD<3:0>,
UP2MD<3:0>, UP1MD<3:0>
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
______________________________________________________________________________________
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SWA or SWA
AL_DAY or
WU or WU
Reserved
Reserved
Reserved
SPDT1 or
SPDT2 or
SLEEP or
SHDN or
DRDY or
AL_DAY
PWM or
SPDT1
SPDT2
MODE
SLEEP
SHDN
DRDY
PWM
GPO
GPI
General-purpose digital input. Active edges detected by UPR_ or UPF_ status
register bits. ALH_ has no effect with this setting.
General-purpose digital output. Logic level set by LL_ bit. ALH_ has no effect with
this setting.
Digital input. DAC A buffer switch control. See the SWA bit description in the
SW_CTRL Register section.
Reserved. Do not use these settings.
D i g i tal i np ut. S P D T1 sw i tch contr ol . S ee the S P D T1< 1:0> b i t d escr i p ti on i n the S W _C TRL
Reg i ster secti on.
D i g i tal i np ut. S P D T2 sw i tch contr ol . S ee the S P D T2< 1:0> b i t d escr i p ti on i n the S W _C TRL
Reg i ster secti on.
Sleep-mode digital input. Overrides power-control register and puts the part into
sleep mode when asserted. When deasserted, power mode is determined by the
SHDN bit.
Wake-up digital input. Asserted edge clears SHDN bit.
Reserved. Do not use these settings.
PWM digital output. Signal defined by the PWM_CTRL register. PWM on (or high or
“1”); assertion level defined by the ALH_ bit. When PWM is disabled (PWME = 0), the
UPIO pin idles high (DV
Power-supply shutdown digital output. Equivalent to SHDN bit. Power-on default of
GPI with pullup ensures initial power-supply turn-on when UPIO is connected to a
power supply with a SHDN input.
RTC alarm digital output. Asserts for time-of-day alarm events; equivalent to ALD in
STATUS register.
Reserved. Do not use these settings.
ADC data-ready digital output. Asserts when analog-to-digital conversion or
calibration completes. Not masked by MADD bit.
DD
or CPOUT) if ALH = 1, and low (DGND) if ALH = 0.
DESCRIPTION