MAX1359B Maxim Integrated Products, MAX1359B Datasheet - Page 65

• Manufacturer Part Number: MAX1359B
• Description: Data-Acquisition System
• Manufacturer: Maxim Integrated Products

DataSheet.in
For best performance, use PC boards with separate
analog and digital ground planes.
Design the PC board so that the analog and digital sec-
tions are separated and confined to different areas of
the board. Join the digital and analog ground planes at
one point. If the DAS (MAX1359B) is the only device
requiring an AGND-to-DGND connection, connect
planes to the AGND pin of the DAS. In systems where
multiple devices require AGND-to-DGND connections,
the connection should still be made at only one point.
Make the star ground as close to the MAX1359B as
possible.
Avoid running digital lines under the device because
these may couple noise onto the device. Run the ana-
log ground plane under the MAX1359B to minimize
coupling of digital noise. Make the power-supply lines
to the MAX1359B as wide as possible to provide low-
impedance paths and reduce the effects of glitches on
the power-supply line.
Shield fast-switching signals such as clocks with digital
ground to avoid radiating noise to other sections of the
board. Avoid running clock signals near the analog
inputs. Avoid crossover of digital and analog signals.
Good decoupling is important when using high-resolu-
tion ADCs. Decouple all analog supplies with 10µF
capacitors in parallel with 0.1µF HF ceramic capacitors
to AGND. Place these components as close to the
device as possible to achieve the best decoupling.
Follow basic layout guidelines when placing a crystal
on a PC board with a DAS to avoid coupled noise.
1) Place the crystal as close as possible to 32KIN and
2) Keep the crystal solder pads and trace width to
3) Place a guard ring (connect to ground) around the
UPIOs, RTC, Voltage Monitors, and Temp Sensor
16-Bit, Data-Acquisition System with ADC, DAC,
32KOUT. Keeping the trace lengths between the
crystal and inputs as short as possible reduces the
probability of noise coupling by reducing the length
of the “antennae”. Keep the 32KIN and 32KOUT
lines close to each other to minimize the loop area
of the clock lines. Keeping the trace lengths short
also decreases the amount of stray capacitance.
32KIN and 32KOUT as small as possible. The larg-
er these bond pads and traces are, the more likely
it is that noise will couple from adjacent signals.
crystal to isolate the crystal from noise coupled
from adjacent signals.
______________________________________________________________________________________
Grounding and Layout
Crystal Layout
4) Ensure that no signals on other PC board layers run
5) Place a local ground plane on the PC board layer
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line is either a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nulled. INL for
the MAX1359B is measured using the endpoint method.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A DNL
error specification of greater than -1 LSB guarantees no
missing codes and a monotonic transfer function.
Gain error is the amount of deviation between the mea-
sured full-scale transition point and the ideal full-scale
transition point.
Common-mode rejection (CMR) is the ability of a
device to reject a signal that is common to both input
terminals. The common-mode signal can be either an
AC or a DC signal or a combination of the two. CMR is
often expressed in decibels.
Power-supply rejection ratio (PSRR) is the ratio of the
input supply change (in volts) to the change in the
converter output (in volts). It is typically measured in
decibels.
directly below the crystal or below the traces to
32KIN and 32KOUT. The more the crystal is isolat-
ed from other signals on the board, the less likely it
is that noise will be coupled into the crystal.
Maintain a minimum distance of 5mm between any
digital signal and any trace connected to 32KIN or
32KOUT.
immediately below the crystal guard ring. This
helps to isolate the crystal from noise coupling from
signals on other PC board layers.
Note: The ground plane must be in the vicinity of the
crystal only and not on the entire board.
Power-Supply Rejection Ratio (PSRR)
Parameter Definitions
Common-Mode Rejection
Gain Error
DNL
INL
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