XR17D152 Exar Corporation, XR17D152 Datasheet

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XR17D152

Manufacturer Part Number
XR17D152
Description
Two-channel Pci-bus Uart
Manufacturer
Exar Corporation
Datasheet

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FEBRUARY 2003
GENERAL DESCRIPTION
The XR17D152
Universal Asynchronous Receiver and Transmitter
(UART) in Exar’s PCI Bus UART family. The device is
designed to meet today’s 32-bit PCI Bus and high
bandwidth requirement in communication systems.
The global interrupt source register provides a
complete interrupt status indication for both channels
to speed up interrupt parsing. Each UART is
independently controlled and has its own 16C550
compatible 5G (Fifth Generation) register set,
transmit and receive FIFOs of 64 bytes, fully
programmable transmit and receive FIFO trigger
levels, transmit and receive FIFO level counters,
automatic hardware flow control with programmable
hysteresis,
control, automatic half-duplex control output, wireless
IrDA (Infrared Data Association) infrared encoder/
decoder, 8 multi-purpose definable inputs/outputs,
and a 16-bit general purpose timer/counter.
N
APPLICATIONS
Exar
F
OTE
IGURE
Universal PCI Bus Add-in Card
Network Management
Factory Automation and Process Control
Ethernet Network to Serial Ports
Point-of-Sale Systems
Multi serial ports RS-232/RS-422/RS-485 Cards
:
Corporation 48720 Kato Road, Fremont CA, 94538
1 Covered by U.S. Patents #5,649,122, #5,832,205
1. B
LOCK
automatic
Power Supply)
CLK (33 MHz)
3.3V or 5V
1
(PCI VI/O
RST#
AD[31:0]
C/BE[3:0]#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
INTA#
IDSEL
PERR#
SERR#
PAR
EECK
EEDI
EEDO
EECS
ENIR
EN485#
(D152) is a monolithic dual PCI Bus
D
IAGRAM
software
Configuration
PCI Local
EEPROM
Registers
Interface
Interface
Space
Bus
(Xon/Xoff)
Timer/Counter
PRELIMINARY
Configuration
16-bit
Registers
Device
UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART
flow
(510) 668-7000
FEATURES
High Performance DUART
Universal PCI Bus Buffers - 3.3V and 5V Operation
32-bit PCI Bus 2.2 Target Interface Compliance
32-bit PCI Bus Interface with EEPROM Interface
A Global Interrupt Source Register for both UARTs
Data Transfer in Byte, Word and Double-word
Data Read/Write Burst Operation
Each UART is independently controlled with:
Eight Multi-Purpose Inputs/outputs
A General Purpose 16-bit Timer/Counter
Sleep Mode with Automatic Wake-up
Same package and pin-out as XR17C152 and XR17L152
(14x14x1.0 mm TQFP)
UA RT
UA RT
Regs
BR G
Regs
BR G
16C550 Compatible 5G Register Set
64-byte Transmit and Receive FIFOs
Transmit and Receive FIFO Level Counters
Programmable TX and RX FIFO Trigger Level
Automatic RTS/CTS or DTR/DSR Flow Control
Automatic Xon/Xoff Software Flow Control
Automatic RS485 HDX Control Output with
Selectable Turn-around Delay
Infrared (IrDA 1.0) Data Encoder/Decoder
Programmable Data Rate with Prescaler
Up to 6.25 Mbps Data Rate at 8X Sampling
UART Channel 0
UART Channel 1
Crystal Osc/Buffer
Inputs/Outputs
Multi-purpose
TX & R X
TX & R X
64 Byte RX FIFO
64 Byte TX F IFO
64 Byte RX FIFO
64 Byte TX F IFO
FAX (510) 668-7017
.
EN DEC
EN DEC
IR
IR
XTAL1
XTAL2
TMRCK
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
DSR1#, RTS1#,
CTS1#, CD1#, RI1#
MPIO0- MPIO7
TX1, RX1, DTR1#,
XR17D152
(Core Logic)
GND
5V VCC
www.exar.com
REV. P1.0.0

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