LPC2131 Philips Semiconductors (Acquired by NXP), LPC2131 Datasheet - Page 19

• Manufacturer Part Number: LPC2131
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
9397 750 14008
Preliminary data sheet
6.15.1 Features
6.16.1 Features
6.17.1 Features
6.15 SPI serial I/O controller
6.16 SSP serial I/O controller
6.17 General purpose timers/counters
The LPC2131/2132/2138 each contain one SPI controller. The SPI is a full duplex serial
interface, designed to be able to handle multiple masters and slaves connected to a given
bus. Only a single master and a single slave can communicate on the interface during a
given data transfer. During a data transfer the master always sends a byte of data to the
slave, and the slave always sends a byte of data to the master.
The LPC2131/2132/2138 each contain one Serial Synchronous Port controller (SSP). The
SSP controller is capable of operation on a SPI, 4-wire SSI™, or Microwire™ bus. It can
interact with multiple masters and slaves on the bus. However, only a single master and a
single slave can communicate on the bus during a given data transfer. The SSP supports
full duplex transfers, with frames of 4 bits to 16 bits of data flowing from the master to the
slave and from the slave to the master. Often only one of these data flows carries
meaningful data.
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock, and optionally generate interrupts or perform other actions at
specified timer values, based on four match registers. It also includes four capture inputs
to trap the timer value when an input signal transitions, optionally generating an interrupt.
Multiple pins can be selected to perform a single capture or match function, providing an
application with ‘or’ and ‘and’, as well as ‘broadcast’ functions among them.
•
•
•
•
•
•
•
•
•
•
•
•
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, Serial, Full Duplex, Communication.
Combined SPI master and slave.
Maximum data bit rate of one eighth of the input clock rate.
Compatible with Motorola SPI, 4-wire TI SSI and National Semiconductor Microwire
buses.
Synchronous Serial Communication.
Master or slave operation.
8-frame FIFOs for both transmit and receive.
Four bits to 16 bits per frame.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Counter or timer operation.
Four 32-bit capture channels per timer that can take a snapshot of the timer value
when an input signal transitions. A capture event may also optionally generate an
interrupt.
Rev. 01 — 18 November 2004
LPC2131/2132/2138
Single-chip 16/32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
19 of 36