HY29F080 Hynix Semiconductor, HY29F080 Datasheet - Page 6

• Manufacturer Part Number: HY29F080
• Description: 8 Megabit (1M X 8), 5 Volt-only, Flash Memory
• Manufacturer: Hynix Semiconductor

HY29F080
Table 3. HY29F080 Bus Operations Requiring High Voltage
Notes:
1. L = V
2. Address bits not specified are Don’t Care.
3. See text for additional information.
4. SGA = sector group address. See Table 1.
Read Operation
Data is read from the HY29F080 by using stan-
dard microprocessor read cycles while placing the
address of the byte to be read on the device’s
address inputs, A[19:0]. As shown in Table 2, the
host system must drive the CE# and OE# inputs
Low and drive WE# High for a valid read opera-
tion to take place. The device outputs the speci-
fied array data on DQ[7:0].
The HY29F080 is automatically set for reading
array data after device power-up and after a hard-
ware reset to ensure that no spurious alteration of
the memory content occurs during the power tran-
sition. No command is necessary in this mode to
obtain array data, and the device remains enabled
for read accesses until the command register con-
tents are altered.
This device features an Erase Suspend mode.
While in this mode, the host may read the array
data from any sector of memory that is not marked
for erasure. If the host attempts to read from an
address within an erase-suspended sector, or
while the device is performing an erase or byte
program operation, the device outputs status data
6
S
P
S
U
S
U
M
C
D
S
P
V
e T
e
e
o r
e
n
e
n
e
o r
o
e
a
m
O
p
p
i r
t c
t c
t c
t c
d
v
n
e t
e t
o r
o r
c i
c i f
p
u
e
p
r o
r o
r o
r o
t c
a f
t c
o
e
r e
e t
e t
t a
a r
o i
G
G
G
t c
G
IL
C
t c
t c
t a
o i
, H = V
y r
o r
o r
o r
r u
o r
n
o
o i
n
d
r e
u
u
u
u
n
e
p
p
p
p
3
IH
, X = Don’t Care. See DC Characteristics for voltage levels.
C
V
X
L
L
L
L
E
D I
#
O
V
V
X
L
L
L
E
D I
D I
#
W
X
X
X
H
H
H
E
#
R
E
V
S
H
H
H
H
H
#
D I
E
- T
A
1 [
S
S
S
G
G
G
9
X
X
X
instead of array data. After completing a program-
ming operation in the Erase Suspend mode, the
system may once again read array data with the
same exceptions noted above. After completing
an internal program or internal erase algorithm,
the HY29F080 automatically returns to the read
array data mode.
The host must issue a hardware reset or the soft-
ware reset command (see Command Definitions)
to return a sector to the read array data mode if
DQ[5] goes high during a program or erase cycle,
or to return the device to the read array data mode
while it is in the Electronic ID mode.
Write Operation
Certain operations, including programming data
and erasing sectors of memory, require the host
to write a command or command sequence to the
HY29F080. Writes to the device are performed
by placing the byte address on the device’s ad-
dress inputs while the data to be written is input
on DQ[7:0]. The host system must drive the CE#
and WE# pins Low and drive OE# High for a valid
write operation to take place. All addresses are
1 :
A
A
A
4
4
4
] 7
[ A
V
V
V
V
V
X
] 9
D I
D I
D I
D I
D I
1, 2
[ A
X
X
X
L
L
L
] 6
[ A
X
X
X
H
L
L
] 1
[ A
X
X
X
H
L
L
] 0
H
H
U
Rev. 6.1/May 01
n y
Y
P
n
D
2
0
0
p
o r
x i
0
Q
9
0 x
0 x
o r
x
e t
X
X
X
F
=
[
D
: 7
e t
0
1
0
c
0
5
8
c
e t
] 0
=
=
x
e t
0
A
d
d
D
=