HY29F400 Hynix Semiconductor, HY29F400 Datasheet - Page 5

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HY29F400

Manufacturer Part Number
HY29F400
Description
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet

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MEMORY ARRAY ORGANIZATION
The 4 Mbit Flash memory array is organized into
11 blocks called sectors (S0, S1, . . . , S10). A
sector is the smallest unit that can be erased and
which can be protected to prevent accidental or
unauthorized erasure. See the ‘Bus Operations’
and ‘Command Definitions’ sections of this docu-
ment for additional information on these functions.
In the HY29F400, four of the sectors, which com-
prise the boot block, vary in size from 8 to 32
Kbytes (4 to 16 Kwords), while the remaining
seven sectors are uniformly sized at 64 Kbytes
(32 Kwords). The boot block can be located at
the bottom of the address range (HY29F400B) or
at the top of the address range (HY29F400T).
Table 1. HY29F400 Memory Array Organization
Notes:
1. X indicates Don’t Care.
2. Address in Byte Mode is A[17:-1].
3. Address in Word Mode is A[17:0].
Rev. 5.2/May 01
D
e
v
c i
e
S
e
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
t c
1
1
0
2
3
4
5
6
7
8
9
0
2
3
4
5
6
7
8
9
1
1
0
0
r o
(
K
6
6
6
6
6
6
6
3
3
6
6
6
6
6
6
6
S
B
1
1
4
4
4
4
4
4
4
2
8
8
8
8
2
4
4
4
4
4
4
4
6
6
z i
K /
3 /
3 /
3 /
3 /
3 /
3 /
3 /
1 /
4 /
4 /
4 /
4 /
1 /
3 /
3 /
3 /
3 /
3 /
3 /
3 /
8 /
8 /
e
W
2
2
2
2
2
2
2
6
6
2
2
2
2
2
2
2
)
A
1 [
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
] 7
A
1 [
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
] 6
S
e
A
t c
1 [
0
0
0
0
0
0
0
0
0
0
0
r o
1
1
1
1
1
1
1
1
1
1
1
] 5
A
A
d
1 [
d
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
e r
] 4
s
A
s
1 [
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
1
1
1
] 3
Table 1 defines the sector addresses and corre-
sponding address ranges for the top and bottom
boot block versions of the HY29F400.
BUS OPERATIONS
Device bus operations are initiated through the
internal command register, which consists of sets
of latches that store the commands, along with
the address and data information, if any, needed
to execute the specific command. The command
register itself does not occupy any addressable
memory location. The contents of the command
register serve as inputs to an internal state ma-
chine whose outputs control the operation of the
device. Table 2 lists the normal bus operations,
A
1 [
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
] 2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A
7 x
7 x
0 x
1 x
2 x
3 x
4 x
5 x
6 x
0 x
1 x
2 x
3 x
4 x
5 x
6 x
7 x
7 x
7 x
0 x
0 x
0 x
d
A
C
8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
4
6
d
B
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
e r
y
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
e t
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
s
0
0
0
0
0
0
0
s
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
M
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
o
0 x
1 x
2 x
3 x
4 x
5 x
6 x
0 x
1 x
2 x
3 x
4 x
5 x
6 x
7 x
7 x
7 x
7 x
0 x
0 x
0 x
a
7 x
d
n
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
e
7
9
B
3
5
7
F
g
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
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F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
2
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3 x
3 x
A
3 x
3 x
0 x
0 x
1 x
1 x
2 x
2 x
3 x
0 x
0 x
0 x
0 x
0 x
1 x
1 x
2 x
2 x
3 x
3 x
d
C
D
8
E
W
0
8
0
8
0
8
0
0
2
3
4
8
0
8
0
8
0
8
d
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
e r
o
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
d r
0
s
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
s
HY29F400
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
M
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3 x
1 x
2 x
3 x
o
0 x
0 x
1 x
1 x
2 x
2 x
3 x
3 x
3 x
3 x
0 x
0 x
0 x
0 x
0 x
1 x
2 x
3 x
a
d
n
B
7
F
7
F
7
F
7
C
D
F
1
2
3
7
F
7
F
7
F
7
F
e
g
F
F
F
F
F
F
F
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e
F
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F
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F
3
F
F
F
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F
F
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F
F
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