PIC10F200 Microchip Technology, Inc., PIC10F200 Datasheet - Page 20

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PIC10F200

Manufacturer Part Number
PIC10F200
Description
6-Pin, 8-Bit Flash Microcontrollersfeatures 6-pin SOT-23 Packaging Precision 4 MHZ Internal Oscillator Baseline Core With 33 Instructions, 2 Stack Levels All Single-cycle Instructions Except For Program Branches Which Are Two Cycles 12-bit Wide
Manufacturer
Microchip Technology, Inc.
Datasheet

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PIC10F200/202/204/206
4.3.2
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
TABLE 4-1:
DS41239A-page 18
Address
00h
01h
02h
03h
04h
05h
06h
07h
N/A
N/A
Legend:
Note 1:
(1)
(4)
2:
3:
4:
5:
INDF
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
CMCON0
TRISGPIO
OPTION
— = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.
The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an
explanation of how to access these bits.
Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change
Reset.
See Table 9-1 for other Reset specific values.
PIC10F204/206 only.
PIC10F204/206 only. On all other devices, this bit is reserved and should not be used.
SPECIAL FUNCTION REGISTERS
Name
SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC10F200/202/204/206)
Uses Contents of FSR to Address Data Memory (not a physical register)
8-bit Real-Time Clock/Counter
Low-order 8 bits of PC
Indirect Data Memory Address Pointer
CMPOUT COUTEN
GPWUF
GPWU
CAL6
Bit 7
CWUF
GPPU
CAL5
Bit 6
(5)
T0CS
CAL4
Bit 5
POL
CMPT0CS CMPON
Preliminary
CAL3
T0SE
Bit 4
TO
I/O Control Register
CAL2
Bit 3
GP3
PSA
PD
CNREF
CAL1
Bit 2
GP2
PS2
Z
CPREF
CAL0
Bit 1
GP1
PS1
DC
 2004 Microchip Technology Inc.
FOSC4
CWU
Bit 0
GP0
PS0
C
00-1 1xxx
xxxx xxxx
xxxx xxxx
1111 1111
111x xxxx
1111 1110
---- xxxx
1111 1111
---- 1111
1111 1111
Power-On
Value on
Reset
(2)
(3)
Page #
29, 33
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