AD1985 Analog Devices, AD1985 Datasheet - Page 41

• Manufacturer Part Number: AD1985
• Description: AC'97 2.3 Soundmax Codec W/jack Sensing
• Manufacturer: Analog Devices

Advanced Jack Sense Register (Index 0x78)
Reg Num Name
0x78
Note: All register bits are read/write except for JS2ST and JS3ST, which are read-only.
JS2INT
JS3INT
JS2ST
JS3ST
JS2MD
JS3MD
JS2TMR
JS3TMR
X
Vendor ID Registers (Index 0x7C–0x7E)
Reg Num Name D15
0x7C
VIDS[7:0]: This register is ASCII encoded to “A”.
VIDF[7:0]: This register is ASCII encoded to “D”.
Reg
Num
0x7E Vendor
VIDT[7:0]: This register is ASCII encoded to “S”.
VIDREV[7:0]: This register is set to 0x75, identifying the AD1985.
Name D15 D14 D13 D12 D11 D10 D9
ID2
Vendor
ID1
Advanced
Jack Sense
VIDT7 VIDT6 VIDT5 VIDT4 VIDT3 VIDT2 VIDT1 VIDT0 VIDREV7 VIDREV6 VIDREV5 VIDREV4 VIDREV3 VIDREV2 VIDREV1 VIDREV0 0x5375
Indicates Pin JS2 has generated an interrupt. Remains set until the software services JS2 interrupt. i.e., JS2 ISR should clear
this bit by writing a 0 to it.
Notes:
1) Interrupts are generated by valid state changes of JS pins.
2) Interrupt to the system is actually an OR combination of this bit and JS3–JS0 INT.
3) The interrupt implementation path is selected by the INTS bit (Register 0x74).
4) It is also possible to generate a software system interrupt by writing a 1 to this bit.
Indicates Pin JS3 has generated an interrupt. Remains set until the software services the JS3 interrupt, i.e., JS3 ISR should
clear this bit by writing a 0 to it. See the JS2INT description above for additional details.
JS2 STATE. This bit always reports the logic state of JS2 pin.
Cannot be used for MIC sensing.
JS3 STATE. This bit always reports the logic state of JS3 pin.
When the voltage reference is set to 3.7 V, the behavior of this pin is inverted to allow for MIC sensing. In this mode, an
inserted jack causes the pin to go low. All other voltage reference levels enable this pin to be used as a standard sense pin.
Only JS3 can be used for MIC sensing.
JS2 MODE. This bit selects the operation mode for the JS2 pin.
0: Jack Sense Mode. (Reset default.)
1: Interrupt Mode.
JS3 MODE. This bit selects the operation mode for the JS3 pin.
0: Jack Sense Mode. (Reset default.)
1: Interrupt Mode.
JS2 Timer Enable. If this bit is set to a 1, JS2 must be high for greater than 298 ms to be recognized.
JS3 Timer Enable. If this bit is set to a 1, JS3 must be asserted (see JS3ST) for greater than 298 ms to be recognized.
Reserved. Do not write.
VIDF7 VIDF6 VIDF5 VIDF4 VIDF3 VIDF2 VIDF1 VIDF0 VIDS7 VIDS6 VIDS5 VIDS4 VIDS3 VIDS2 VIDS1 VIDS0 0x4144
D15
X
D14
D14
X
D13
D13 D12
X
D12
X
D11
D11 D10 D9
X
D10
D8
X
Rev. 0 | Page 41 of 48
D9
D7
X
D8
D8
X
D6
D7
D7 D6 D5
JS3
TMR
D5
D6
JS2
TMR
JS3MD JS2MD JS3ST JS2ST JS3INT JS2INT N/A
D4
D5
D4
D4
D3
D3
D3
D2
D2
D2
D1
D1
D1
D0
D0
D0
AD1985
Default
Default
Default