AD1985 Analog Devices, AD1985 Datasheet - Page 7

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AD1985

Manufacturer Part Number
AD1985
Description
AC'97 2.3 Soundmax Codec W/jack Sensing
Manufacturer
Analog Devices
Datasheet

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CLOCK SPECIFICATIONS
Parameter
Input Clock Frequency (XTAL Mode or Clock Oscillator)
Input Clock Frequency (Reference Clock Mode)
Input Clock Frequency (USB Clock Mode)
Recommended Clock Duty Cycle
TIMING PARAMETERS
(Guaranteed over Operating Temperature Range.)
Parameter
RESET Active Low Pulsewidth
RESET Inactive to SDATA_IN or BIT_CLK Active Delay
SYNC Active High Pulsewidth
SYNC Low Pulsewidth
SYNC Inactive to BIT_CLK Startup Delay
BIT_CLK Frequency
BIT_CLK Period
BIT_CLK Output Jitter
BIT_CLK High Pulsewidth
BIT_CLK Low Pulsewidth
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to Trailing Edge of RESET (Applies to SYNC, SDATA_OUT)
Rising Edge of RESET to High-Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid
RESET Inactive to BIT_CLK Startup Delay
NOTES
1
2
Guaranteed but not tested.
Output jitter directly dependent on crystal input jitter; max specified for noncrystal operation.
1,2
Rev. 0 | Page 7 of 48
Min
40
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RST_LOW
RST2CLK
SYNC_HIGH
SYNC_LOW
SYNC2CLK
CLK_PERIOD
CLK_HIGH
CLK_LOW
SYNC_PERIOD
SETUP
HOLD
RISECLK
FALLCLK
RISESYNC
FALLSYNC
RISEDIN
FALLDIN
RISEDOUT
FALLDOUT
S2_PDOWN
SETUP2RST
OFF
CO
TRI2ACTV
Typ
24.576
14.31818
48.000
50
Min
162.8
162.8
33
33
10
5
2
2
2
2
2
2
2
2
0
15.0
Typ
1.0
1.3
19.5
12.288
81.4
750
42
38
48.0
20.8
2.5
4
4
4
4
4
4
4
4
Max
60
Max
2000
48
48
6
6
6
6
6
6
6
6
1.0
25.0
15
50
15
25
Unit
MHz
MHz
MHz
%
AD1985
Unit
µs
ns
µs
µs
ns
MHz
ns
ps
ns
ns
kHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns

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