AD8305 Analog Devices, AD8305 Datasheet - Page 11

• Manufacturer Part Number: AD8305
• Description: 100 Db-range (10nA-1mA) Logarithmic Converter
• Manufacturer: Analog Devices

The dynamic response of this overall input system is influenced by
the external RC networks connected from the two inputs (INPT,
IREF) to ground. These are required to stabilize the input systems
over the full current range. The bandwidth changes with the
input current due to the widely varying pole frequency. The RC
network adds a zero to the input system to ensure stability over the
full range of input current levels. The network values shown in
Figure 2 will usually suffice, but some experimentation may be
necessary when the photodiode capacitance is high.
Although the two current inputs are similar, some care is needed
to operate the reference input at extremes of current (<100 nA)
and temperature (<0∞C). Modifying the RC network to 4.7 nF
and 2 kW will allow operation to –40∞C at 10 nA. By inspecting
the transient response to perturbations in I
current levels, the capacitor value can be adjusted to provide fast
rise and fall times with acceptable settling. To fine tune the net-
work zero, the resistor value should be adjusted.
CALIBRATION
The AD8305 has a nominal slope and intercept of 200 mV/decade
and 1 nA, respectively. These values are untrimmed and the
slope alone may vary as much as 7.5% over temperature. For
this reason, it is recommended that a simple calibration be done
to achieve increased accuracy.
Figure 3 shows the improvement in accuracy when using a two-
point calibration method. To perform this calibration, apply two
known currents, I
10 nA and 1 mA. Measure the resulting output, V
respectively, and calculate the slope m and intercept b.
The same calibration could be performed with two known opti-
cal powers, P
measurement system while providing a simplified relationship
between the incident optical power and V
REV. A
Figure 3. Using Two-Point Calibration to Increase
Measurement Accuracy
m
b V
m
b V
1.4
1.2
1.0
0.8
0.6
0.4
0.2
=
=
=
=
0
1n
(
(
V
1
V
1
1
–
1
–
–
–
m
1
m P
10n
V
V
and P
¥
¥
2
2
log
)
) (
1
1
/ log
/
and I
[
UNCALIBRATED ERROR
10
2
P
100n
IDEAL OUTPUT
. This allows for calibration of the entire
MEASURED OUTPUT
1
( )
–
I
10
1
2
P
, in the linear operating range between
( )
2
I
1
)
1
– log
I
PD
– A
10
10
( )
CALIBRATED ERROR
I
2
100
]
LOG
REF
at representative
voltage.
1m
1
10m
and V
–1
–2
–3
4
3
2
1
0
2
(10)
,
(7)
(8)
(9)
–11–
The use of a negative supply, V
be placed at ground level whenever the input transistor (Q1 in
Figure 1) has a sufficiently negative bias on its emitter. When
V
the default case when VSUM is grounded. This bias need not
be accurate, and a poorly defined source can be used. The
source does however need to be able to support the quiescent
current as well as the INPT and IREF signal current. For example,
it may be convenient to utilize a forward-biased junction voltage
of about 0.7 V or a Schottky barrier voltage of a little over 0.5 V.
The effect of supply on the dynamic range and accuracy can be
seen in TPC 8.
With the summing node at ground, the AD8305 may now be
used as a voltage-input log amp at either the numerator input,
INPT, or the denominator input, IREF, by inserting a suitably
scaled resistor from the voltage source to the relevant pin. The
overall accuracy for small input voltages is limited by the voltage
offset at the inputs of the JFET op amps.
The use of a negative supply also allows the output to swing
below ground, thereby allowing the intercept to correspond to a
midrange value of I
referenced to the ACOM pin, and while it does not swing nega-
tive for default operating conditions, it is free to do so. Thus,
adding a resistor from VLOG to the negative supply lowers
all values of VLOG, which raises the intercept. The disadvan-
tage of this method is that the slope is reduced by the shunting
of the external resistor, and the poorly defined ratio of on-
chip and off-chip resistances causes errors in both the slope
and the intercept.
The Uncalibrated Error line in Figure 3 was generated assuming
that the slope of the measured output was 200 mV/decade when
in fact it was actually 194 mV/decade. Correcting for this dis-
crepancy decreased measurement error up to 3 dB.
USING A NEGATIVE SUPPLY
Most applications of the AD8305 require only a single supply of
3.0 V to 5.5 V. However, to provide further versatility, dual
supplies may be employed, as illustrated in Figure 4.
NEG
1nF
1k
V
RREF
200k
BIAS
= –0.5 V, the V
I
PD
+
V
–
R
VSUM
F
S
VRDZ
VREF
1k
1nF
IREF
INPT
V
Figure 4. Negative Supply Application
N
0.5V
I
I
q
SIG
0.5V
+ I
PD
= I
SIG
PD
CE
. However, the voltage V
20k
+ I
COMM
of Q1 and Q2 will be the same as for
VNEG
REF
Q2
Q1
80k
V
N
–
C1
+
V
NEG
V
VPOS
2.5V
, allows the summing node to
BE2
BE1
COMPENSATION
TEMPERATURE
£ –0.5V
5V
GENERATOR
BIAS
COMM
R
S
14.2k
6.69k
£
LOG
I
LOG
AD8305
I
q
V
+ I
0.5 log
N
remains
451
SIGMAX
– V
COMM
VOUT
SCAL
BFIN
F
10
( )
1nA
I
PD
12k
8k
VLOG
10nF
C
FLT