AD8305 Analog Devices, AD8305 Datasheet - Page 13

• Manufacturer Part Number: AD8305
• Description: 100 Db-range (10nA-1mA) Logarithmic Converter
• Manufacturer: Analog Devices

REVERSING THE INPUT POLARITY
Some applications may require interfacing to a circuit that
sources current rather than sinks current, such as connecting to
the cathode side of a photodiode. Figure 7 shows the use of a
current mirror circuit. This allows for simultaneous monitoring
of the optical power at the cathode, and a data recovery path
using a transimpedance amplifier at the anode. The modified
Wilson mirror provides a current gain very close to unity and a
high output resistance. Figure 8 shows measured transfer function
and law conformance performance of the AD8305 in conjunc-
tion with this current mirror interface.
CHARACTERIZATION METHODS
During the characterization of the AD8305, the device was
treated as a precision current-input logarithmic converter, since
it is not practical for several reasons to generate accurate photo-
currents by illuminating a photodiode. The test currents were
generated either by using well calibrated current sources, such
as the Keithley 236, or by using a high value resistor from a
voltage source to the input pin. Great care is needed when using
very small input currents. For example, the triax output connec-
tion from the current generator was used with the guard tied to
VSUM. The input trace on the PC board was guarded by con-
necting adjacent traces to VSUM.
REV. A
Figure 7. Wilson Current Mirror for Cathode Interfacing
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
Figure 8. Log Output and Error Using Current
Mirror with Various Supplies
0
I
1n
PD
MAT03
MAT03
+3V
5V
1nF
TIA
1k
0.1 F
+5V
10n
200k
10nA TO 1mA
1nF
5V
I
IN
100n
I
PD
2.5V
0V
0V
DATA PATH
1
1
2
3
4
0.1 F
I
PD
IREF
INPT
VRDZ
VREF
COMM COMM COMM COMM
– A
VSUM VNEG VNEG VPOS
10
16
5
AD8305
15
6
100
14
7
1m
5V
13
5V
8
+5V
VOUT
SCAL
VLOG
BFIN
+3V
log
V
10m
OUT
10
1.00
0.75
0.50
0.25
0
–0.25
–0.50
–0.75
–1.00
12
11
10
9
(I
OUTPUT
= 0.2
PD
/1nA)
–13–
These measures are needed to minimize the risk of leakage
current paths. With 0.5 V as the nominal bias on the INPT pin,
a leakage-path resistance of 1 GW to ground would subtract
0.5 nA from the input, which amounts to an error of –0.44 dB for
a source current of 10 nA. Additionally, the very high output
resistance at the input pins and the long cables commonly needed
during characterization allow 60 Hz and RF emissions to introduce
substantial measurement errors. Careful guarding techniques
are essential to reduce the pickup of these spurious signals.
The primary characterization setup shown in Figure 9 is used to
measure V
ance, slope and intercept, the voltages appearing at pins VSUM,
INPT and IREF, and the buffer offset and V
ature. To ensure stable operation over the full current range of
I
and R13 = 2 kW are used at pin to IREF ground. In some cases,
a fixed resistor between pins VREF and IREF was used in place
of a precision current source. For the dynamic tests, including
noise and bandwidth measurements, more specialized setups
are required.
Figure 10 shows the configuration used to measure the buffer
amplifier bandwidth. The AD8138 evaluation board includes
REF
PROVIDES DC OFFSET
+IN
and temperature extremes, filter components of C1 = 4.7 nF
KEITHLEY 236
KEITHLEY 236
EVALUATION
Figure 10. Configuration for Buffer Amplifier
Bandwidth Measurement
AD8138
BOARD A
AD8138
Figure 9. Primary Characterization Setup
TRIAX CONNECTORS
(SIGNAL – INPT AND IREF
GUARD – VSUM
SHIELD – GROUND)
OUTPUT
REF
, the static (dc) performance, logarithmic conform-
B
NETWORK ANALYZER
INPUT R
BNC-T
HP 3577A
1
2
3
4
IREF
INPT
INPUT A
VREF
VRDZ
IREF
INPT
VREF
COMM COMM COMM COMM
VSUM VNEG VNEG VPOS
16
CHARACTERIZATION
5
AD8305
INPUT B
VNEG
AD8305
DC MATRIX/DC SUPPLIES/DMM
BOARD
15
6
14
REF
7
VSUM
drift with temper-
VPOS
13
8
AD8305
VOUT
SCAL
VLOG
BFIN
VOUT
VLOG
BFIN
0.1 F
12
11
10
9
+V
S