AMBE-1000 Digital Voice Systems, Inc., AMBE-1000 Datasheet - Page 59
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AMBE-1000
Manufacturer Part Number
AMBE-1000
Description
Manufacturer
Digital Voice Systems, Inc.
Datasheet
1.AMBE-1000.pdf
(71 pages)
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7.2
Number
Pin
98
99
90
89
88
91
92
93
95
37
38
40
39
76
46
47
52
53
54
2
3
4
5
6
The AMBE-1000 is not recommended for new designs.
Please refer to the AMBE-2000/2020 product line.
Pin Descriptive
ECHOCAN_EN
Pin Descriptions
Table 7-A Pin Descriptions
BPS_SEL3
BPS_SEL2
BPS_SEL1
BPS_SEL0
SLEEP_EN
H_STOPN
CH_SEL2
CH_SEL1
CH_SEL0
SLIP_EN
VAD_EN
CHP_D7
CHP_D6
CHP_D5
RESETN
C_SEL2
C_SEL1
C_SEL0
CLK_I2
CLK_O
Name
CLK_I
DPE
EPR
N/A
N/A
The AMBE-1000 is not recommended for new designs.
Please refer to the AMBE-2000/2020 product line.
Pin Direction
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
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Notes
Channel Interface Selection Pins : Use these bits to select the channel
interface type (parallel, serial, active, passive) according to Table 3-A.
See full description in section 3.2.
A/D-D/A Select Pins :
compatible with the A/D-D/A chip in the design, then simply use Table
5-A to select the interface.
described in section 4.1.14.4 should be used to configure this interface.
Coding Rate Select Pins : Use these bits to select the voice and FEC
rates according to Table 6-A. See full description in section 6.2. The
coding rates are also selectable using the Command Frame interface
described in section 4.1.14.2.
Voice Activation Detection Enable Pin. Active HIGH. See Section 6.4.
VAD can also be enabled/disabled using the Command Frame interface
as described in section 4.1.14.4.
Echo Canceller Enable Pin. Active HIGH. See Section 6.3. The Echo
Canceller can also be enabled/disabled using the Command Frame
interface as described in section 4.1.14.4.
Standard Sleep Enable Pin. Active HIGH. See Section 6.6.1.
Slip Control Enable Pin. Active HIGH. See Section 6.7.
Clock Input 1. 26-30Mhz input. See Section 7.4
Clock Input 2. See Section 7.4
Buffered Clock Output. See Section 7.3
AMBE-1000 Reset pin. Active LOW. See Section 7.3
Hardware Sleep pin. Active LOW. See Section 6.6.3.
Encode Packet Ready : During normal operation this active LOW signal
will go low once every 20 milliseconds to notify the controller that the
encoder has a coded frame to output. See section 3 for further details.
Decoder Packet Empty : During normal operation this active LOW signal
will go low once every 20 milliseconds (see exception section 4.1.14.6)
to signify that the decoder is ready for another frame of data to be
input. See section 3 for further details.
Parallel Interface : Data 7 ; MSB
Serial Interface : Unused I/O, see note 1. Ground through 10kOhm.
Parallel Interface : Data 6
Serial Interface : Unused I/O, see note 1. Ground through 10kOhm.
Parallel Interface : Data 5
page 59
If one of the 6 built in A/D-D/A interfaces is
Otherwise the Command Frame interface