LPC2925 NXP Semiconductors, LPC2925 Datasheet - Page 19

• Manufacturer Part Number: LPC2925
• Description: (LPC2921 - LPC2925) ARM9 microcontroller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_2923_2925_0
Preliminary data sheet
www.DataSheet4U.com
6.8.3 Flash bridge wait-states
6.8.4 Pin description
6.8.5 Clock description
6.8.6 EEPROM
6.9 General Purpose DMA (GPDMA) controller
The index sector is a special sector in which the JTAG access protection and sector
security are located. The address space becomes visible by setting the FS_ISS bit and
overlaps the regular flash sector’s address space.
Note that the index sector, once programmed, cannot be erased. Any flash operation must
be executed out of SRAM (internal or external).
To eliminate the delay associated with synchronizing flash-read data, a predefined
number of wait-states must be programmed. These depend on flash-memory response
time and system clock period. The minimum wait-states value can be calculated with the
following formulas:
Synchronous reading:
Asynchronous reading:
Remark: If the programmed number of wait-states is more than three, flash-data reading
cannot be performed at full speed (i.e. with zero wait-states at the AHB bus) if speculative
reading is active.
The flash memory controller has no external pins. However, the flash can be programmed
via the JTAG pins, see
The flash memory controller is clocked by CLK_SYS_FMC, see
EEPROM is a non-volatile memory mostly used for storing relatively small amounts of
data, for example for storing settings. It contains one 16 kB memory block and is
byte-programmable and byte-erasable.
The EEPROM can be accessed only through the flash controller.
The GPDMA controller allows peripheral-to memory, memory-to-peripheral,
peripheral-to-peripheral, and memory-to-memory transactions. Each DMA stream
provides unidirectional serial DMA transfers for a single source and destination. For
example, a bidirectional port requires one stream for transmit and one for receives. The
source and destination areas can each be either a memory region or a peripheral, and
can be accessed through the same AHB master or one area by each master.
WST
WST
>
>
t
----------------- -
t
--------------------- -
t
t
acc clk
acc addr
t
tclk sys
tclk sys
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Rev. 00.01 — 24 October 2008
Section
6.6.3.
ARM9 microcontroller with CAN and LIN
LPC2921/2923/2925
Section
© NXP B.V. 2008. All rights reserved.
6.7.2.
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