LPC2925 NXP Semiconductors, LPC2925 Datasheet - Page 47
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LPC2925
Manufacturer Part Number
LPC2925
Description
(LPC2921 - LPC2925) ARM9 microcontroller
Manufacturer
NXP Semiconductors
Datasheet
1.LPC2925.pdf
(81 pages)
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NXP Semiconductors
LPC2921_2923_2925_0
Preliminary data sheet
Fig 12. Block diagram of the CGU1
www.DataSheet4U.com
BASE_ICLK0_CLK
BASE_ICLK1_CLK
6.15.3.1 Pin description
6.15.4.1 Functional description
6.15.4 Reset Generation Unit (RGU)
The CGU1 module in the LPC2921/2923/2925 has the pins listed in
Table 26.
The RGU controls all internal resets.
The key features of the Reset Generation Unit (RGU) are:
Each reset output is defined as a combination of reset input sources including the external
reset input pins and internal power-on reset, see
this table form a sort of cascade to provide the multiple levels of impact that a reset may
have. The combined input sources are logically OR-ed together so that activating any of
the listed reset sources causes the output to go active.
Symbol
CLK_OUT
•
•
•
•
Reset controlled individually per subsystem
Automatic reset stretching and release
Monitor function to trace resets back to source
Register write-protection mechanism to prevent unintentional resets
CLOCK GENERATION UNIT
PLL
CGU1 pins
(CGU1)
clkout
clkout120
clkout240
Rev. 00.01 — 24 October 2008
Direction
OUT
AHB TO DTL BRIDGE
FDIV0
Description
clock output
ARM9 microcontroller with CAN and LIN
LPC2921/2923/2925
Table
27. The first five resets listed in
OUT 0
OUT 2
Table 25
© NXP B.V. 2008. All rights reserved.
BASE_USB_CLK
BASE_OUT_CLK
002aae250
below.
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