MT8926 Zarlink Semiconductor, MT8926 Datasheet - Page 8
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MT8926
Manufacturer Part Number
MT8926
Description
T1 Performance Monitoring Adjunct Circuit (PMAC)
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT8926.pdf
(36 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
SEMICMF.019
Data Sheet
It should be noted that the PMAC will replace some of the data of MT8976/77 Master Status Words 1 and 2. This
is outlined in Table 1 on page 7 and Table 2 on page 7.
The MT8926 can be programmed to either pass data through from FDLi to FDLo and on to the MT8976/77 input
TxFDL, or insert bit-oriented messages into the FDL via the transmit bit-oriented message register, channel 7 of
CSTi1. This function is under control of the FDLEn bit of the PMAC Control Word. See Application section Figure 9
on page 21 for FDL connections.
Channel 15 of CSTi1, the Loopback Control Word, is used to control the line loopback code generation and payload
loopback functions of the PMAC. This is done by internally connecting the MT8926 DSTo to either a line loopback
enable code generator, a line loopback disable code generator, DSTi0 or DSTi1. Figure 6 on page 8 illustrates the
connections required to support these functions. The DSTo of the framer connects to DSTi1 of the PMAC and to
the receive side of the system. This allows the PMAC to perform a payload loopback by internally connecting DSTi1
to DSTo. In normal operation, transmit data will flow from DSTi0 to DSTo of the PMAC to DSTi of the MT8976/77.
Table 1 - Master Status Word 1 Data Substitution
Table 2 - Master Status Word 2 Data Substitution
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
MT8976/77 CSTo
MT8976/77 CSTo
MFSYNC
CRCCNT
CRCCNT
CRCCNT
ESFYLW
BPVCnt
BPVCnt
YLALR
MIMIC
BlAlm
FrCnt
SLIP
ERR
BPV
SYN
Xst
MT8926 CSTo
MT8926 CSTo
MFSYNC
YLALR
MIMIC
ALRM
BlAlm
FrCnt
SLIP
SYN
LOS
RAI
CSI
SEI
FSI
BSI
AIS
Xst
MT8926
7