TS68020 ATMEL Corporation, TS68020 Datasheet - Page 35

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TS68020

Manufacturer Part Number
TS68020
Description
Hcmos 32-bit Virtual Memory Mpu, 16/20/25 MHZ
Manufacturer
ATMEL Corporation
Datasheet

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2115A–HIREL–07/02
Other microprocessors in the TS68000 Family can operate any TS68000 co-processor
even though they may not have the hardware implementation of the co-processor inter-
face as does the TS68020. Since the co-processor is operated through the co-
processor interface registers which are accessed via normal asynchronous bus cycles,
the co-processor may be used as a peripheral device. Software easily emulates the
communication protocol by addressing the co-processor interface registers appropri-
ately and passing the necessary commands and operands required by the co-
processor.
The co-processor interface registers are implemented by the co-processor in addition to
those registers implemented as extensions to the TS68020 programmer’s model. For
example, the TS68881 implements the co-processor interface registers shown in Table
10 and the registers in the programming model, including eight 80-bit floating-point data
registers and three 32-bit control/status registers used by the TS68881 programmer.
Table 10. Co-processor Interface Registers
Table 11. Co-processor Primitives
Register
Response
Control
Save
Restore
Operation Word
Command Word
Condition Word
Operand
Register Select
Instruction Address
Operand Address
Processor Synchronization
Instruction Manipulation
Exception Handling
Busy with Current Instruction
Proceed with Next Instruction, If No Trace
Service Interrupts and Re-query, If Trace Enable
Proceed with Execution, Condition True/False
Transfer Operation Word
Transfer Words from Instruction Stream
Take Privilege Violation if S Bit Not Set
Take Pre-Instruction Exception
Take Mid-Instruction Exception
Take Post-Instruction Exception
Function
Requests Action from CPU
CPU
Initiate Save of Internal State
Initiate Restore of Internal State
Current Co-processor Instruction
Co-processor Specific Command
Condition to be Evaluated
32-bit Operand
Specifies CPU Register or Mask
Pointer to Co-processor Instruction
Pointer to Co-processor Operand
TS68020
R/W
R/W
R/W
R/W
R/W
W
W
W
W
R
R
R
35

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