SST55LD019A Silicon Storage Technology, Inc., SST55LD019A Datasheet - Page 10

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SST55LD019A

Manufacturer Part Number
SST55LD019A
Description
Ata Flash Disk Controllersst's Ata Flash Disk Controller is The Heart of a High Performance, Flash Media-based Data Storage System. The Ata Flash Disk Controller Recognizes The Control, Address, And Data Signals on The Ata/ide Bus And Translates Them
Manufacturer
Silicon Storage Technology, Inc.
Datasheet

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Advance Information
TABLE
©2004 Silicon Storage Technology, Inc.
Symbol
WP_PD#
Flash Media Interface
FWP#
FRDYbsy#
FRE#
FWE#
FCLE
FALE
FAD15
FAD14
FAD13
FAD12
FAD11
FAD10
FAD9
FAD8
FAD7
FAD6
FAD5
FAD4
FAD3
FAD2
FAD1
FAD0
FCE6#
FCE5#
FCE4#
FCE3#
FCE2#
FCE1#
FCE0#
FCE7#/
INTCLKEN
Serial Communication Interface (SCI)
SCID
SCID
OUT
IN
3-1: P
100-TQFP
62
97
82
84
96
92
94
46
44
42
40
35
33
31
29
45
43
41
39
34
32
30
28
91
95
93
89
88
80
86
26
79
78
IN
A
SSIGNMENTS
Pin No.
64-TQFP 84-BGA
38
55
61
59
60
29
28
27
26
23
22
21
20
56
19
54
53
(C
F9
B4
A8
B7
A4
C6
B5
K8
K7
H6
H5
K3
K6
K5
H4
K2
H3
B6
C5
A5
A6
C7
B8
A7
A9
C8
J5
J3
J2
J7
J6
J4
J1
ONTINUED
Type
Pin
I/O
I/O
O
O
O
O
O
I
I
I
) (2
I3U/O5
I3U/O5
I3D/O4
Type
SST55LD019A / SST55LD019B / SST55LD019C
I4U
OF
I1U
I3U
I/O
O5
O5
O4
O4
3)
1
10
Name and Functions
The WP_PD# pin can be used for either the Write Protect
mode or Power-down mode, but only one mode is active at any
time. The Write Protect or Power-down modes can be selected
through the host command. The Write Protect mode is the fac-
tory default setting.
Active Low Flash Media Chip Write Protect
Connect this pin to the NAND flash media Write Protect pin
Flash Media Chip Ready/Busy#
Signal high is flash media ready signal. Low is busy.
Active Low Flash Media Chip Read
Active Low Flash Media Chip Write
Active High Flash Media Chip Command Latch Enable
Active High Flash Media Chip Address Latch Enable
Flash Media Chip Low Byte Address/Data Bus pins
Active Low Flash Media Chip Enable pin
This pin is sensed during the Power-on Reset (POR) to select
an internal clock mode. If this pin is pulled up during the
Power-on Reset then the internal clock is selected.
Flash Media Chip High Byte Address/Data Bus pins
Active Low Flash Media Chip Enable pin
SCI interface data output
SCI interface data input
ATA Flash Disk Controller
S71241-02-000
4/04

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