SST55LD019A Silicon Storage Technology, Inc., SST55LD019A Datasheet - Page 67

• Manufacturer Part Number: SST55LD019A
• Description: Ata Flash Disk Controllersst's Ata Flash Disk Controller is The Heart of a High Performance, Flash Media-based Data Storage System. The Ata Flash Disk Controller Recognizes The Control, Address, And Data Signals on The Ata/ide Bus And Translates Them
• Manufacturer: Silicon Storage Technology, Inc.

ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
12.2.3 Multi-word DMA Data Transfer
TABLE 12-9: M
Note: All AC specifications are guaranteed by design.
©2004 Silicon Storage Technology, Inc.
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
0
D
E
F
G
H
I
J
KR
KW
LR
LW
M
N
Z
FIGURE 12-4: I
1
1. T
is the minimum IORD#/IOWD# negation time. A host should lengthen T
reported in the device ID.
0
is the minimum total cycle time, T
Parameter
Cycle Time
IORD#/IOWD# Asserted Pulse Width
IORD# Data Access
IORD# Data Hold
IORD#/IOWD# Data Setup
IOWD# Data Hold
DMACK# to IORD#/IOWR# Setup
IORD#/IOWD# to DMACK Hold
IORD# Negated Pulse Width
IOWD# Negated Pulse Width
IORD# to DMARQ Delay
IOWD# to DMARQ Delay
CS(1:0) Valid to IORD#/IOWD#
CS(1:0) Hold
DMACK# to Read Data Released
ULTI
NITIATING A
-
WORD
CS1FX#/CS3FX#
IORD#/IOWR
Read DQ
Write DQ
DMA T
DMACK#
DMARQ
M
ULTI
D
15-0
15-0
is the minimum IORD#/IOWD# assertion time, and T
IMING
-
WORD
Note: The host should not assert DMACK# or negate both CS1FX#
P
ARAMETERS
and CS3FX# until the assertion of DMARQ is detected.
The maximum time from the assertion of DMARQ to the assertion
of DMACK# or the negation of both CS0 and CS1 is not defined.
DMA D
T
T
M
I
See note
See note
ATA
T
E
- M
67
T
T
RANSFER
D
ODE
T
G
D
and/or T
2
T
F
T
H
K
to ensure that T
K
(T
Min
120
1241 F05.0
70
20
10
25
25
25
10
5
0
5
KR
or T
0
is equal to the value
KW
, as appropriate)
Max
50
35
35
25
Advance Information
S71241-02-000
Units
T12-9.0 1241
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4/04