PIC16C745/P Microchip Technology, PIC16C745/P Datasheet - Page 27

• Manufacturer Part Number: PIC16C745/P
• Description: 8-Bit CMOS Microcontrollers with USB
• Manufacturer: Microchip Technology

4.2.2.6
This register contains the individual enable bit for the
CCP2 peripheral interrupt.
REGISTER 4-6: PERIPHERAL INTERRUPT ENABLE 2 REGISTER (PIE2: 8Dh)
4.2.2.7
This register contains the CCP2 interrupt flag bit. .
REGISTER 4-7:
bit7
Note:
bit7
1999 Microchip Technology Inc.
bit 7-1: Unimplemented: Read as ’0’
bit 0:
bit 7-1: Unimplemented: Read as ’0’
bit 0:
U-0
U-0
—
—
PIE2 REGISTER
PIR2 REGISTER
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
CCP2IF: CCP2 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused
U-0
U-0
—
—
PERIPHERAL INTERRUPT REGISTER 2 (PIR2: 0Dh)
U-0
U-0
—
—
U-0
U-0
—
—
Advanced Information
U-0
U-0
—
—
U-0
U-0
—
—
U-0
U-0
—
—
bit0
bit0
CCP2IE
CCP2IF
R/W-0
R/W-0
PIC16C745/765
R = Readable bit
W = Writable bit
U = Unimplemented bit,
-n = Value at POR reset
R = Readable bit
W = Writable bit
U = Unimplemented bit,
-n = Value at POR reset
read as ‘0’
read as ‘0’
DS41124A-page 27