ISL9N306AP3 Fairchild Semiconductor, ISL9N306AP3 Datasheet - Page 9

• Manufacturer Part Number: ISL9N306AP3
• Description: N-channel Logic Level PWM Optimized UltraFET Trench Power MOSFETs
• Manufacturer: Fairchild Semiconductor

©2002 Fairchild Semiconductor Corporation
SABER Electrical Model
REV May 2001
template ISL9N306A n2,n1,n3
electrical n2,n1,n3
{
var i iscl
dp..model dbodymod = (isl = 3.6e-11, nl=1.075 , rs = 3.5e-3, trs1 = 1e-3, trs2 = 1e-6, xti=1.0, cjo = 1.45e-9, tt = 8e-11, m = 0.51,)
dp..model dbreakmod = (rs =0.17, trs1 = 1e-3, trs2 = -8.9e-6)
dp..model dplcapmod = (cjo = 11.5e-10, isl=10e-30, nl=10, m=0.46)
m..model mmedmod = (type=_n, vto = 1.7, kp=9, is=1e-30, tox=1)
m..model mstrongmod = (type=_n, vto = 2.1, kp = 100, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 1.36, kp = 0.05, is = 1e-30, tox = 1, rs=0.1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -4.0, voff = -0.8)
sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -0.8, voff = -4.0)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.3, voff = 0.2)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.2, voff = -0.3)
c.ca n12 n8 = 2.0e-9
c.cb n15 n14 = 2.3e-9
c.cin n6 n8 = 3e-9
dp.dbody n7 n5 = model=dbodymod
dp.dbreak n5 n11 = model=dbreakmod
dp.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
l.ldrain n2 n5 = 1e-9
l.lgate n1 n9 = 4.58e-9
l.lsource n3 n7 = 1.47e-9
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
res.rbreak n17 n18 = 1, tc1 = 1e-3, tc2 = -7e-7
res.rdrain n50 n16 = 1e-3, tc1 = 1.2e-2, tc2 = 3.0e-5
res.rgate n9 n20 = 2.69
res.rldrain n2 n5 = 10
res.rlgate n1 n9 = 45.8
res.rlsource n3 n7 = 14.7
res.rslc1 n5 n51= 1e-6, tc1 = 1e-3, tc2 =1e-6
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 3.5e-3, tc1 = 1e-3, tc2 =1e-6
res.rvtemp n18 n19 = 1, tc1 = -1.8e-3, tc2 = -1e-6
res.rvthres n22 n8 = 1, tc1 = -2.6e-3, tc2 = -7.5e-6
spe.ebreak n11 n7 n17 n18 = 35.8
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e-6/275))** 5))
}
}
GATE
1
RLGATE
LGATE
9
RGATE
CA
12
20
EVTEMP
+
S1B
S1A
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
6
8
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
5
MSTRO
14
51
21
RDRAIN
RSLC1
50
ISCL
16
8
MMED
8
RSOURCE
DBREAK
IT
MWEAK
17
EBREAK
RVTHRES
RBREAK
11
+
-
17
18
7
+
-
18
22
RVTEMP
19
RLSOURCE
RLDRAIN
LSOURCE
VBAT
LDRAIN
DBODY
Rev. B, February 2002
SOURCE
DRAIN
2
3