AN214 Philips, AN214 Datasheet - Page 3

• Manufacturer Part Number: AN214
• Description: 74F Extended Octal-Plus Family Applications
• Manufacturer: Philips

Philips Semiconductors
The 8-, 9-, and 10-bit Series 24-pin Solution
Whether your system requires an 8–, 9-, or 10-bit bus interface, the
Extended Octal-Plus Family has standardized solutions in
24-pin/Slim-DIP/Broadside input/output packages with corner power
supply pins (12 & 24) and standard designations for common control
functions located at or near the package corners. Octals offer more
mode control inputs than do the 9- or 10-bit products. Virtually all
family devices with 3-State outputs are guaranteed to source/sink
–15/64mA @ V
Latched Drivers, which are spec’ed at –15mA/48mA). The A
outputs of several of the family’s transceivers are guaranteed to
supply –3mA/48mA).
The Octal Parity Bus Series offers several notable exceptions to the
above standard pinouts. This series has three parts with two
center-package ground pins to minimize ground-bounce noise. All
outputs (except the A
spec’ed at –3mA/24mA) are guaranteed to source/sink more than
–15mA/64mA.
Current PC board, multi-layer technology make is possible to take
into consideration the physical location of input/output pins,
transmission line characteristics and supply power distribution.
Lining up all inputs and output on opposite sides of the package
allows the address, data and control bus signal to flow in a direct
physical path from the P CPU through the bus interface chips and
onto the appropriate bus. This “broadside” bus design approach
produces very clean PC board layouts and may, in fact eliminate
and entire PC board interconnection layer. Standardization of power
supply, mode control and input/output pins, whether 8-, 9-, or 10-bit
bus functions, permits simplified, structured PC board layout.
June 1988
74F extended octal-plus family applications
Y
IN
D1
D5
D2
OH
Q1
Q1A
/V
Q2
OL
N
Q3
= 2.0/0.55V (except for the 74F841–846
port of the 74F657 Parity Bus Transceiver
R2
50
D4
D3
D6
R3
10K
R1
6K
Q4
R5
5K
Figure 3. 74F455 Buffer/Drive Cell Circuit Diagram
Q5
R6
6K
R4
50
D7
R9
2.8K
R7
7.5K
R8
2K
Q8
N
D8
EN
Q6
Q7
port
Q9
3
R10
2.8K
D9
Q10
Input Structures
Referring to Figure 3, the 74F455 Inverting Buffer/Driver Cell Circuit
Diagram is an example of the family’s input and output circuitry. The
patented Philips Semiconductors “Light-Load” NPN input structure
(Q1/23/4/5, R1/2/3/4/5/6 and D4) and turn-OFF speed-up circuit (Q2
and D2/3) are used throughout the 74F Extended Octal-Plus Family.
the “Light-Load” NPN input is actually a high speed, differential
amplifier with the reference side, the anode of D4, clamped at two
diode voltage drops above ground (BE junctions of Q8/9/10 and Q
11 of
the BE junction of Q1 is forward based allowing beta amplified, CE
current to flow into the <1.0mA constant current source, Q3 (driven
by Q4/5 and R2/3/4/5/6). The beta of Q1 is guaranteed, by design,
to be >50, thereby guaranteeing that the input base bias current will
be <20 A. The emitter of Q1 rises to 1V
V
flow through R1.
The patented turn-OFF circuit consisting of Q2 and D2/3 produces a
dynamic speed to help turn Q8/9/10 OFF quickly. During the time
that the Q1 is turned-ON (input = V
Schottky diode, D2, acting as a capacitor, will be charged to the
voltage at the emitter of Q1A or 1V
(>2.0 – 1V
stored charge discharges through the BE of Q2. Q2 CE current
through D3 rapidly turns Q8/9/10 OFF.
These circuit innovations produce high performance, very low input
bias current ( 20 A) gate inputs. This input leakage represents a
30X reduction over the standard 74F family’s 600 A input current
with virtually no loss in speed. The 74F Extended Octal-Plus
IH
, reverse biasing D4 and permitting C8/9/10 base bias current to
R11
2.8K
R12
500
D10
D11
1.4V at 25 C). When the V
BE
). When the input is switched to <V
Q12
R13
10K
V
CC
Q13
Q11
R14
D13
D12
Y
OUT
I
1) If I
2) If I
IH
OL
BE
IH
rises above this clamp voltage,
options:
>2.0V), the revers-biased
voltage drop below the input
OH
OH
BE
R14
R11
R10
R12
R14
R11
R10
R12
/I
/I
( 300mV) below the
OL
OL
=
=
=
=
=
=
=
=
=
=
IL
(or <0.8V), the D2
Application note
AN214
–15/64 mA
–3/24 mA
2.8K
2.8K
500
5K
5K
2K
12
30
SF01331