AN214 Philips, AN214 Datasheet - Page 4

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AN214

Manufacturer Part Number
AN214
Description
74F Extended Octal-Plus Family Applications
Manufacturer
Philips
Datasheet

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Philips Semiconductors
Transceivers have an input loading current of 70 A, which is the
combination of the “Light-Load” NPN input structure’s 20 A and the
3-State Hi-Z output’s 50 A leakage current.
The low “Light-Load” input current and high speed performance
makes this family ideal for interfacing to low drive capability, slower
MOS CPU, peripherals and semi-custom chips used in most of
today’s state-of-the-art logic designs. Besides very low input current
requirements, this “Light-Load” input has another significant
advantage over “traditional” input structures: Very low input
capacitance (smaller stored charge) due to very small device
geometries. Therefore, when Extended Octal-Plus devices are
connected to a bus, they present less AC bus loading and do not
significantly lower the characteristic impedance of the bus to the
extent “traditional” input structures do. Thus, the amount of the AC
current a bus driver has to produce to change the state of the bus is
lowered and in many cases can make a difference between incident
wave switching of the bus versus losing time waiting for a reflected
wave.
The Philips Semiconductors 74F “Light-Load” input structure is
discussed in more detail in Application Note AN215 .
Output Drive Capabilities
Virtually all devices in the EXtended Octal-Plus Family are
guaranteed to source/sink more than –15mA/64mA @ V
2.0/0.55V. One exception is the 74F841-thru-846 Series of Bus
Interface Latches which are specified at –15/48mA. Several of the
family’s transceiver products have lower A
to reduce package power dissipation. Refer to Tables 1 and 3.
For example, the 74F657 Parity Bus Transceiver has two output
ports with different capacities: The A
source/sink –3mA/24mA (I
an output drive capability of –15mA/64mA at 2.0V/0.55V. The
74F657’s A
board to the backplane bus, while the B
transmission line or bus backplane line.
Referring to Figure 3, all of the Family’s 3-State, totem-pole output
structures have a schottky blocking diode, D13, in their pull-up
Table 1. Family Output Drive Capabilities Using the 74F657 Parity Bus Transceiver
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions, V
June 1988
SYMBOL
V
V
V
V
I
I
OS
OS
O
OH
O
OL
74F extended octal-plus family applications
N
port is designed to interface the chip side of the PC
High level output voltage
High-level output voltage
Low level output voltage
Low-level output voltage
A
B
N
N
output High level short circuit current (R14 = 30 )
output High level short circuit current (R14 = 12 )
OH
/I
OL
= 2.4/0.50V), and the B
PARAMETER
N
port is guaranteed to
N
port is capable of driving a
N
IL
All outputs
All outputs
B port PARITY ERROR
B
A port
A
B port PARITY ERROR
B
output drive capabilities
N
N
N
= MAX and V
port, PARITY, ERROR
port
port, PARITY, ERROR
OH
N
V
port has
IH
OL
= MIN)
=
4
I
I
I
I
I
I
I
I
OH
OH
OH
OH
OL
OL
OL
OL
output structures. These diodes block leakage current from flowing
into the outputs when V
This gives a very important advantage of being able to power down
a PCB (or several PCBs) without disabling the bus and even without
producing any glitching on the bus due to an undesired change in
the output state of the device being powered down.
The output short-circuit (I
anode-to-cathode resistance/voltage drop of D13 and the
collector-to-emitter/base-to-emitter resistance/voltage drop of Q13
limit the amount of current that can be sourced from a HIGH level
output at a specified V
equal to 12 . the A
R14 of 30 producing I
from the B
The output HIGH level sourcing current, I
voltage, V
D13, the pull-up darlington transistor, Q12/13, and the desired V
level from V
anode-to-cathode resistance of D13 and the collector-to-emitter/
base-to-emitter resistance.
Assumptions:
V
V
I
I
I
I
I
I
Obviously, we have been very conservative in the I
to guardband against all conditions of temperature and
input/output/supply voltage levels. The R
output pullup transistors and blocking diode are large enough to
prevent I
R14 = 30 . (Refer to Table 1.)
OH
OH
OH
OS
OS
OS
D13
Q12/13
= 24mA
= 24mA
= 48mA
= 48mA
TEST CONDITIONS
= –3mA
= –3mA
= –15mA
= –15mA
(R14 = 12 ) = –[4.5V–(0.5V + 1.2V + 2.0V)]/23 = –35mA
(R14 = 30 ) = –[4.5V–(0.5V + 1.2V + 2.0V)]/41 = –20mA
(R14 = 12 ) = –[5.5V–(0.5V + 1.2V)]/23 = –165mA
(R14 = 30 ) = –[5.5V–(0.5V + 1.2V)]/41 = –93mA
= 1[V
= I
OH
0.5V @ R
OS
CC
@ V
OH
N
1.2V @ R
CC
–(V
from exceeding –225mA for R14 = 12 and –150mA for
ports 12 R14.
, can be calculated by subtracting the voltage drops of
V
V
OH
10% V
5% V
10% V
5% V
10% V
5% V
10% V
5% V
and dividing by the value of R14 plus the
CC
CC
D13
= 0.0V and V
ON
= MAX
= MAX
N
+ V
CC
CC
CC
CC
ON
port of several of the transceivers utilize an
= 3 @ 25 C),
CC
CC
CC
CC
OH
Q12/Q13
OH
CC
= 8 @ 25 C)
OS
. For most of the parts in the family, R14 is
(@ V
is either open or shorted to ground.
) limiting resistor (R14), the
CC
MIN
+ V
2.4
2.7
2.0
2.0
OH
= 5.5V
OH
= 20V) of –6mA versus –15mA
)]/(R14 + R
ON
OH
TYP
0.35
0.35
0.40
0.40
3.4
, at a specified output
resistances of the
D13
OH
MAX
–150
–225
0.50
0.50
0.55
0.55
+ R
Application note
AN214
specification
Q13
).
UNIT
mA
mA
V
V
V
V
V
V
V
V
OH

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