S-1200 Seiko Instruments, S-1200 Datasheet - Page 10

• Manufacturer Part Number: S-1200
• Description: HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
• Manufacturer: Seiko Instruments

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The S-1200 Series requires an output capacitor between the VOUT and VSS pins for phase compensation.
Operation is stabilized by a ceramic capacitor with an output capacitance of 0.1 µF or more in the entire
temperature range.
capacitor, a ceramic capacitor with a capacitance of 0.1 µF or more and an ESR of 1.0 Ω or less is required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output
capacitor. The required capacitance of the input capacitor differs depending on the application.
The recommended value for an application is 0.1 µF or more for C
selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature characteristics,
on the actual device.
10
HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series
Standard Circuit
Application Conditions
Selection of Input and Output Capacitors (C
Caution The above connection diagram and constant will not guarantee successful operation.
Input capacitor (C
Output capacitor (C
ESR of output capacitor:
Caution A general series regulator may oscillate, depending on the external components selected.
Perform thorough evaluation using the actual application to set the constant.
Check that no oscillation occurs with the application using the above capacitor.
IN
However, when using an OS capacitor, tantalum capacitor, or aluminum electrolytic
):
L
):
Input
0.1 µF or more
0.1 µF or more
1.0 Ω or less
*1. C
*2. A ceramic capacitor of 0.1 µF or more can be used for C
C
IN
IN
*1
is a capacitor for stabilizing the input.
Single GND
Seiko Instruments Inc.
ON/OFF
VIN
Figure 10
VSS
VOUT
IN
, C
L
)
IN
GND
and 0.1 µF or more for C
C
L
*2
Output
L
L
; however, when
.
Rev.3.2
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