S-1200 Seiko Instruments, S-1200 Datasheet - Page 14

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S-1200

Manufacturer Part Number
S-1200
Description
HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Manufacturer
Seiko Instruments
Datasheet

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14
HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
S-1200 Series
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the V
resistance of several hundreds kΩ between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to V
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Logic Type
ON/OFF
A
A
B
B
Figure 13
“H”: Power off
“H”: Power on
“L”: Power on
“L”: Power off
ON/OFF Pin
VSS
VIN
Internal Circuits
IN
– 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
Operating
Operating
Stopped
Stopped
Seiko Instruments Inc.
Table 6
VOUT Pin Voltage
Set value
Set value
V
V
SS
SS
level
level
SS
level due to the internally divided
Current Consumption
I
I
I
I
SS1
SS2
SS2
SS1
Rev.3.2
_00

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