MT28F322D20 Micron Technology, MT28F322D20 Datasheet - Page 22
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MT28F322D20
Manufacturer Part Number
MT28F322D20
Description
(MT28F322D18 / MT28F322D20) FLASH MEMORY
Manufacturer
Micron Technology
Datasheet
1.MT28F322D20.pdf
(44 pages)
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LATENCY COUNTER
that must elapse after ADV# is set active before data will
be available. This value depends on the input clock fre-
2 Meg x 16 Async/Page/Burst Flash Memory
MT28F322D20FH_4.p65 – Rev. 4, Pub. 7/02
1 CLK
2 CLK
Hold
Data
Hold
Data
The latency counter provides the number of clocks
Hold Data Output Configuration
DQ0–DQ15
DQ0–DQ15
CLK
DQ0–DQ15
DQ0–DQ15
DQ0–DQ15
A0–A20
ADV#
CLK
Figure 10
NOTE: 1. Maximum frequency for the MT28F322D18FH-705 device is 52 MHz.
OUTPUT
FREQUENCY PERIOD CONFIGURATION
VALID
V
V
V
V
V
V
V
V
V
V
V
V
O L
O L
O L
OH
OH
OH
-705
-804
IH
IH
IH
IL
IL
IL
(MHz)
MAX
OUTPUT
VALID
54
20
30
20
30
40
Clock Frequency vs. First Access Latency
1
OUTPUT
VALID
ADDRESS
VALID
(ns)
18.5
Code 2
Code 3
Code 4
OUTPUT
50
33
50
33
25
VALID
OUTPUT
VALID
Latency Counter
OUTPUT
VALID
COUNTER
LATENCY
Figure 9
Table 9
ASYNC/PAGE/BURST FLASH MEMORY
2
3
4
2
3
4
22
OUTPUT
VALID
quency. See Table 9 for the specific input clock frequency
configuration code. See Figure 9 also.
CLK CYCLES
OUTPUT
OUTPUT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
VALID
VALID
FOR FIRST
Wired OR WAIT# Configuration
Burst CPU/
Wait State Logic
DATA
3
4
5
3
4
5
OUTPUT
OUTPUT
OUTPUT
VALID
VALID
VALID
READY #
DATA
TIME (ns)
Figure 11
ACCESS
OUTPUT
OUTPUT
OUTPUT
SYNC
VALID
VALID
VALID
92.5
150
132
150
132
125
Bus data
UNDEFINED
OUTPUT
OUTPUT
OUTPUT
VALID
VALID
VALID
2 MEG x 16
Wired OR
DQ0–DQ15
DQ0–DQ15
WAIT#
WAIT#
©2002, Micron Technology, Inc.
MT28F322D18
MT28F322D18
.
.
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