MT9M019 Aptina Imaging Corporation, MT9M019 Datasheet - Page 16

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MT9M019

Manufacturer Part Number
MT9M019
Description
1/5-Inch 1.3Mp CMOS Digital Image Sensor
Manufacturer
Aptina Imaging Corporation
Datasheet
Output Size Restrictions
Effect of Scaler on Legal Range of Output Sizes
Figure 9:
PDF: 7723845879/Source:2828556980
MT9D019_DS - Rev. F 5/10 EN
Effect of Limiter on SMIA Data Path
The CCP2 specification imposes the restriction that an output line shall be a multiple of
32 bits in length. This imposes an additional restriction on the legal values of
x_output_size:
• When ccp_data_format[7:0] = 8 (RAW8 data), x_output_size must be a multiple of 4
• When ccp_data_format[7:0] = 10 (RAW10 data), x_output_size must be a multiple of
This restriction can be met by rounding up x_output_size to an appropriate multiple.
Any extra pixels in the output image as a result of this rounding contain UNDEFINED
pixel data but are guaranteed not to cause false synchronization on the CCP2 data
stream.
There is an additional restriction that x_output_size must be small enough such that the
output row time (set by x_output_size, the framing and CRC overhead of 12 bytes, the
ccp_signalling_mode, and the output clock rate) must be less than the row time of the
video array (set by line_length_pck and the video timing clock rate).
When the scaler is enabled, it is necessary to adjust the values of x_output_size and
y_output_size to match the image size generated by the scaler. The MT9M019 will not
operate properly if the x_output_size and y_output_size are significantly larger than the
output image. To understand the reason for this, consider the situation where the sensor
is operating at full resolution and the scaler is enabled with a scaling factor of 32 (half the
number of pixels in each direction). This situation is shown in Figure 9.
In Figure 9, three different stages in the SMIA data path are shown. The first stage is the
output of the sensor core. The core is running at full resolution and x_output_size is set
to match the active array size. The LINE_VALID signal is asserted once per row and
remains asserted for N pixel times. The PIXEL_VALID signal toggles with the same
timing as LINE_VALID, indicating that all pixels in the row are valid.
Core output: full resolution, x_output_size = x_addr_end - x_addr_start + 1
Scaler output: scaled to half size
Limiter output: scaled to half size, x_output_size = x_addr_end - x_addr_start + 1
LINE VALID
PIXEL VALID
LINE VALID
PIXEL VALID
LINE VALID
PIXEL VALID
(x_output_size[1:0] = 0).
16 (x_output_size[3:0] = 0).
16
MT9M019: 1/5-Inch 1.3Mp CMOS Digital Image Sensor
Aptina reserves the right to change products or specifications without notice.
Programming Restrictions
©2006 Aptina Imaging Corporation. All rights reserved.
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