SST25VF512A SST, SST25VF512A Datasheet - Page 3

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SST25VF512A

Manufacturer Part Number
SST25VF512A
Description
512 Kbit SPI Serial Flash
Manufacturer
SST
Datasheet

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512 Kbit SPI Serial Flash
SST25VF512A
PIN DESCRIPTION
TABLE 1: P
©2006 Silicon Storage Technology, Inc.
Symbol Pin Name
SCK
SI
SO
CE#
WP#
HOLD#
V
V
DD
SS
FIGURE 1: P
Serial Clock
Serial Data
Input
Serial Data
Output
Chip Enable
Write Protect
Hold
Power Supply
Ground
WP#
V SS
CE#
IN
SO
D
IN
ESCRIPTION
A
1
2
3
4
SSIGNMENTS
8-
Functions
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock input, while output
data is shifted out on the falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
The device is enabled by a high to low transition on CE#. CE# must remain low for the duration of
any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
To temporarily stop serial communication with SPI flash memory without resetting the device.
To provide power supply (2.7-3.6V).
LEAD
Top View
1264 08-soic P1.0
SOIC
8
7
6
5
V DD
HOLD#
SCK
SI
3
WP#
CE#
V SS
SO
1
2
3
4
8-
CONTACT
Top View
1264 08-wson P2.0
WSON
8
7
6
5
V DD
HOLD#
SCK
SI
S71264-02-000
Data Sheet
T1.0 1264
1/06

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