SST49LF040 Silicon Storage Technology, SST49LF040 Datasheet - Page 25

• Manufacturer Part Number: SST49LF040
• Description: 4 Mbit LPC Flash
• Manufacturer: Silicon Storage Technology

4 Mbit LPC Flash
SST49LF040
Advance Information
©2001 Silicon Storage Technology, Inc.
FIGURE 13: D
LFRAME#
LAD[3:0]
RST#
CE#
LCLK
RST# = V IH
RST# = V IH
LFRAME#
LFRAME#
CE# = V IL
CE# = V IL
LAD[3:0]
LAD[3:0]
LCLK
LCLK
Note: YYYY must be within memory address range specified in Figures 4 and 5.
ATA
# P
1st Start
OLLING
Start
Start
1 Clock 1 Clock
1 Clock 1 Clock
1 Clock 1 Clock
0000b 011Xb
0000b
0000b
Memory
Memory
Memory
010Xb
010Xb
Write
Cycle
Read
Cycle
Read
Cycle
T
IMING
A[31:28] A[27:24]
A[31:28] A[27:24]
A[31:28] A[27:24]
D
IAGRAM
A[23:20] A[19:16]
A[23:20] A[19:16]
A[23:20] A[19:16]
Load Address in 8 Clocks
Write the last command (Program or Erase) to the device in LPC mode.
Load Address in 8 Clocks
Load Address in 8 Clocks
When internal write complete, the DQ 7 will equal to D7.
Read the DQ 7 to see if internal write complete or not.
Address 1
Address 1
(LPC M
Address 1
A[15:12]
A[15:12]
A[15:12]
25
ODE
A[11:8]
A[11:8]
A[11:8]
)
A[7:4]
A[7:4]
A[7:4]
A[3:0]
A[3:0]
A[3:0]
Load Data in 2 Clocks
D[3:0]
1111b
1111b
2 Clocks
2 Clocks
TAR
Data
TAR
Tri-State
Tri-State
Dn[7:4]
1 Clock
1 Clock
0000b
0000b
1111b
Sync
Sync
2 Clocks
TAR
Data out 2 Clocks
Tri-State
Data out 2 Clocks
XXXXb
XXXXb
Data
Data
1 Clock
0000b
D7#,xxx
D7,xxx
Sync
S71213-00-000 11/01 562
TAR
TAR
TAR
562 ILL F12.1
Command
Start next
Next start
Next start
1 Clock
1 Clock
1 Clock
0000b
0000b
0000b