ISL9104A Intersil Corporation, ISL9104A Datasheet
ISL9104A
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ISL9104A Summary of contents
Page 1
... In addition, the ISL9104, ISL9104A offers a quick bleeding function that discharges the output capacitor when the IC is disabled. The ISL9104, ISL9104A is offered in a 1.6x1.6mm µTDFN package. The complete converter occupies less than 2 0.5CM ...
Page 2
... These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2 ISL9104, ISL9104A OUTPUT VOLTAGE TEMP RANGE (V) (Note 2) (° ...
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... Undervoltage Lockout Threshold (UVLO) UVLO Hysteresis Quiescent Supply Current (for ISL9104 adjustable output voltage only) Quiescent Supply Current (for ISL9104A adjustable output only) Quiescent Supply Current (for ISL9104A 1.5V fixed output) Shut Down Supply Current OUTPUT REGULATION FB Voltage Accuracy (for adjustable output only) ...
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... FIGURE 1. EFFICIENCY vs LOAD CURRENT ( +85° +25° -45°C 10 2.70 3.25 3.80 4.35 INPUT VOLTAGE (V) FIGURE 3. INPUT QUIESCENT CURRENT ISL9104, ISL9104A = 4.7µ (see “Typical Applications” on page 8). Parameters with MIN and/or MAX 2 OUT SYMBOL TEST CONDITIONS 3.6V -20°C to +85° 100 90 ...
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... OUT 5V/DIV V SW 20mV/DIV V (AC COUPLED) OUT 20mA/DIV I o FIGURE 9. LOAD TRANSIENT IN PFM MODE ( 1.5V, 5mA TO 30mA) OUT 5 ISL9104, ISL9104A (Continued) 5V/DIV 1V/DIV 200mA/DIV 5V/DIV 400 500 FIGURE 6. SOFT-START TO PFM MODE (V 5V/DIV 2V/DIV 200mA/DIV 5V/DIV FIGURE 8. SOFT-START TO PFM MODE (V = 3.6V, IN 5V/DIV ...
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... V (AC COUPLED) OUT 200mA/DIV I o FIGURE 15. LOAD TRANSIENT FROM PFM TO PWM MODE (V = 3.6V 2.5V, 5mA TO 300mA) IN OUT 6 ISL9104, ISL9104A (Continued) 5V/DIV 20mV/DIV 20mA/DIV = 3.6V, FIGURE 12. LOAD TRANSIENT IN PFM MODE (V IN 5V/DIV 50mV/DIV 200mA/DIV FIGURE 14. LOAD TRANSIENT FROM PWM TO PFM MODE 5V/DIV 50mV/DIV 200mA/DIV FIGURE 16 ...
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... Regulator enable pin. Enable the device when driven to high. Shut down the chip and discharge output capacitor when driven to low. Do not leave this pin floating. SW Switching node connection. Connect to one terminal of inductor. GND Ground connection. 7 ISL9104, ISL9104A (Continued) 5V/DIV 20mV/DIV 500mA/DIV FIGURE 18. LOAD TRANSIENT IN PWM MODE (V = 3.6V, IN 5V/DIV ...
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... C1, C2 Input and output Murata capacitor C3 Capacitor KEMET R1, R2 Resistor Various 8 ISL9104, ISL9104A ISL9104, ISL9104A ADJUSTABLE OUTPUT VIN GND ISL9104, ISL9104A FIXED OUTPUT VIN GND FIGURE 21. TYPICAL APPLICATIONS DIAGRAM PART NUMBER LB3218-T1R0MK GRM188R60J475KE19D C0402C470J5GACTU - L OUTPUT 1.0µH 500mA C2 R1 4.7µF ...
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... NOTE: For Adjustable output version, the internal feedback resistor divider is disabled and the FB pin is directly connected to the error amplifier. Theory of Operation The ISL9104, ISL9104A is a step-down switching regulator optimized for battery-powered handheld applications. The regulator operates at typical 4.3MHz fixed switching frequency under heavy load condition to allow small external inductor and capacitors to be used for minimal printed-circuit board (PCB) area ...
Page 10
... SW node does not cross zero during any cycle within the 16-consecutive cycles. Once ISL9104, ISL9104A enters the skip mode, the pulse modulation starts being controlled by the SKIP comparator shown in Figure 22. Each pulse cycle is still synchronized by the PWM clock. The ...
Page 11
... Low Dropout Operation The ISL9104, ISL9104A features low dropout operation to maximize the battery life. When the input voltage drops to a level that ISL9104, ISL9104A can no longer operate under switching regulation to maintain the output voltage, the P-Channel MOSFET is completely turned on (100% duty cycle) ...
Page 12
... The PCB layout is a very important converter design step to make sure the designed converter works well, especially under the high current high switching frequency condition. For ISL9104, ISL9104A, the power loop is composed of the output inductor L, the output capacitor C the PGND pin necessary to make the power loop as small as possible and the connecting traces among them should be direct, short and wide ...
Page 13
... LEAD ULTRA THIN DUAL FLAT NO-LEAD COL PLASTIC PACKAGE (UTDFN COL) Rev 1, 11/07 1.60 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYPICAL RECOMMENDED LAND PATTERN 13 ISL9104, ISL9104A A PIN #1 INDEX AREA 0.5 ±0 MAX REF NOTES: 1 ...