D7225G NEC, D7225G Datasheet - Page 15

• Manufacturer Part Number: D7225G
• Description: Search -----> UPD7225G
• Manufacturer: NEC

www.DataSheet4U.com
(3) Divide-by-3 time division
(4) Divide-by-4 time division
The contents of the 8 bits of the serial register of the segment decoder output (8 bits) are written to bits 0, 1, and
2 of each address. In this case, 0 will be automatically written to bit 2 of address n + 2. For segment decoder
output, 0 will also be automatically written to bit 2 (D2) of address n.
The contents of bits 0, 1, and 2 of each address are effective as display data.
After the data is written, the data pointer points to address n + 3.
The segment decoder output written to the data memory corresponds to segments (a to g, DP) shown in Figure
2-1 as follows:
The contents of the 8 bits of the serial register or the segment decoder output (8 bits) are written to bits 0, 1, 2,
and 3 of each address. For segment decoder output, 0 is automatically written to bit 3 (D3) of address n.
The contents of all bits of each address are effective as display data.
After the data is written, the data pointer points to address n + 2.
When 7 segments are used, the segment decoder output written to the data memory corresponds to segments
(a to g, DP) shown in Figure 2-1 as follows:
When 14 segments are used, the segment decoder output is written to bits 0, 1, 2, and 3 of each address. In
this case, 0s are automatically written to bit 3 of address n + 2, and bit 0 of address n+ 1.
D15 D14 D13 D12
n + 3
D11
0
D10 D9 D8
0
n + 2
n + 2
n + 2
Data Sheet S14308EJ6V0DS00
D7 D6
e
f
D7 D6 D5 D4
D7 D6 D5
d
D5 D4 D3
d
e
n + 1
n + 1
n + 1
n + 1
n + 1
g
g
D4
a
f
0
bit3
bit3
bit3
bit3
bit3
DP
D3
D3 D2 D1 D0
0
Address n
Address n
Address n
Address n
Address n
DP
D2
D2 D1 D0
c
0
D1 D0
c
b
bit0
bit0
bit0
bit0
bit0
b
a
PD7225
15