ST7528 Sitronix, ST7528 Datasheet
ST7528
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ST7528 Summary of contents
Page 1
... Sitronix INTRODUCTION The ST7528 is a driver & controller LSI for 16-level gray scale graphic dot-matrix liquid crystal display systems. It contains 2 Mode (160X100,132X128) for Segment and Common driver circuits. This chip is connected directly to a microprocessor, accepts Serial Peripheral Interface (SPI), IIC or 8-bit parallel display data and stores in an on-chip display data RAM of 160 x 129 x 4 bits ...
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... ST7528 4-Line , 3-Line interface (without IIC interface) ST7528i IIC interface Note1: we would like to recommend to use the external VOUT when the panel is large than 1.8 inch Note2: we would like to recommend to set lower VOP than 12 voltage, when the panel size is large like 1.6 inch Ver2 ...
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... ST7528 ST7528 Pad Arrangement (COG) Chip Size: 12,575 um × 1,220 um Bump Pitch: PAD 229, 353 ~ 385 (COM/SEG), PAD NO 230 ~ 338 (I/O) ,PAD NO 339 ~ 352 (I/O) , PAD 338~339: 81um. Bump Size: PAD 196, 218 ~ 229, 353 ~ 364 : 35(x) um ×96(y) um PAD NO 197 ~ 217, 365 ~ 385 : 96(x) um ×35(y) um PAD NO 230 ~ 352 : 55(x)um × ...
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... ST7528 Pad Center Coordinates Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 1 COM30 2 COM29 3 COM28 4 COM27 5 COM26 6 COM25 7 COM24 8 COM23 9 COM22 10 COM21 11 COM20 12 COM19 13 COM18 14 COM17 15 COM16 16 COM15 17 COM14 18 COM13 19 COM12 20 COM11 21 COM10 22 COM9 23 COM8 24 COM7 25 COM6 26 COM5 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 34 SEG1 35 SEG2 36 SEG3 37 SEG4 38 SEG5 39 SEG6 40 SEG7 41 SEG8 42 SEG9 43 SEG10 44 SEG11 45 SEG12 46 SEG13 47 SEG14 48 SEG15 49 SEG16 50 SEG17 51 SEG18 52 SEG19 53 SEG20 54 SEG21 55 SEG22 56 SEG23 57 SEG24 58 SEG25 59 SEG26 60 SEG27 61 SEG28 62 SEG29 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 69 SEG36 70 SEG37 71 SEG38 72 SEG39 73 SEG40 74 SEG41 75 SEG42 76 SEG43 77 SEG44 78 SEG45 79 SEG46 80 SEG47 81 SEG48 82 SEG49 83 SEG50 84 SEG51 85 SEG52 86 SEG53 87 SEG54 88 SEG55 89 SEG56 90 SEG57 91 SEG58 92 SEG59 93 SEG60 94 SEG61 95 SEG62 96 SEG63 97 SEG64 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 104 SEG71 105 SEG72 106 SEG73 107 SEG74 108 SEG75 109 SEG76 110 SEG77 111 SEG78 112 SEG79 113 SEG80 114 SEG81 115 SEG82 116 SEG83 117 SEG84 118 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 139 SEG106 140 SEG107 141 SEG108 142 SEG109 143 SEG110 144 SEG111 145 SEG112 146 SEG113 147 SEG114 148 SEG115 149 SEG116 150 SEG117 151 SEG118 152 SEG119 153 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 174 COM73 175 COM74 176 COM75 177 COM76 178 COM77 179 COM78 180 COM79 181 COM80 182 COM81 183 COM82 184 COM83 185 COM84 186 COM85 187 COM86 188 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 209 COM108 210 COM109 211 COM110 212 COM111 213 COM112 214 COM113 215 COM114 216 COM115 217 COM116 218 COM117 219 COM118 220 COM119 221 COM120 222 COM121 223 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 244 E_RD 245 E_RD 246 D0 247 D0 248 D1 249 D1 250 D2 251 D2 252 D3 253 D3 254 D4 255 D4 256 D5 257 D5 258 D6 259 D6 260 D7 261 D7 262 VDD 263 VDD 264 VDD 265 VDD 266 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 279 VDD2 280 VDD2 281 VDD2 282 VDD2 283 VDD2 284 VSS2 285 VSS2 286 VSS2 287 VSS2 288 VSS2 289 VSS2 290 VSS2 291 VSS2 292 VSS2 293 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 314 VOUT_OUT 315 VOUT_OUT 316 VOUT_OUT 317 VOUT_OUT 318 VOUT_OUT 319 VOUT_OUT 320 VOUT_IN 321 VOUT_IN 322 VOUT_IN 323 VOUT_IN 324 VOUT_IN 325 VOUT_IN 326 T[8] 327 T[7] 328 T[6] 329 T[5] 330 ...
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... ST7528 Name for Mode0 Name for Mode1 Pad No. (132seg x 128com) (160seg x 100com) 349 V2 350 V1 351 V0 352 V0 353 COM63 354 COM62 355 COM61 356 COM60 357 COM59 358 COM58 359 COM57 360 COM56 361 COM55 362 COM54 363 COM53 364 COM52 365 ...
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... ST7528 BLOCK DIAGRAM VDD VSS V/F Circuit V0 VR INTRS V/R Circuit VEXT REF V/C Circuit VOUT_IN VOUT_OUT VDD2 VSS2 MPU INTERFACE(PARALLEL & SERIAL) Ver2.3 SEG0 TO SEG159 COM0 TO COM128 SEGMENT DRIVERS COMMON DRIVERS DATA LATCHES FRC/PWM FUNCTION CIRCUIT DISPLAY DATA RAM (DDRAM) [160X129X4] ...
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... ST7528 PIN DESCRIPTION POWER SUPPLY Name I/O VDD Supply VSS Supply VSS2 Supply VDD2 Supply If the internal Vout voltage generator is used, the VOUT_IN & VOUT_OUT must be connected Supply VOUT_OUT together external supply is used, this pin must be left open. An external Vout supply voltage can be supplied using the VOUT_IN pad. In this case, ...
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... ST7528 SYSTEM CONTROL Name I/O Description INTRS I Internal resistor select pin This pin selects the resistors for adjusting V0 voltage level INTRS = "H": use the internal resistors. INTRS = "L": use the external resistors VR pin and external resistive divider control V0 voltage T[0] ~ T[9] ...
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... ST7528 MICROPROCESSOR INTERFACE Microprocessor Interface Pin Description Name I/O Description RST I Reset input pin When RESETB is “L”, initialization is executed. PS[2:0] I Parallel / Serial data input select input PS2 PS1 *NOTE: In 4-Line, 3-Line and IIC serial mode impossible to read data from the on-chip RAM. ...
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... ITO track resistance possible during the acknowledge cycle the ST7528 will not be able to create a valid logic 0 level. By splitting the SDA_IN input from the SDA_OUT output the device could be used in a mode that ignores the acknowledge bit ...
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... COMS O Common output for the icons (COMS1) The output signals of two pins are same. When not used, these pins should be left open. ST7528 I/O PIN ITO Resister Limitation PIN Name PS2,PS1,PS0,REF,OCS1,INTRS,Mode, TA T0…9 , VR(No used) , VEXT(No used) Vdd, Vdd2, Vss, Vss2, VOUT_IN , VOUT_OUT, VR(used) , VEXT(used) CSB , … ...
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... Chip Select Input There is CSB pin for chip selection. The ST7528 can interface with an MPU when CSB is "L". When these pins are set to any other combination, A0, E_RD, and RW_WR inputs are disabled and DB0 to DB7 are to be high impedance. And, in case of serial interface, the internal shift register and the counter are reset ...
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... When the ST7528 is active (CSB=”L”), serial data (DB7) and serial clock (DB6) inputs are enabled. And not active, the internal 8-bit shift register and the 3-bit counter are reset. The display data/command indication may be controlled either via software or the Register Select (A0) Pin, based on the setting of PS1. When the A0 pin is used (PS1 = “ ...
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... ST7528 3-Line SPI Mode (PS0 = "L", PS1 = "L",PS2= "L") To write data to the DDRAM, send Data Direction Command in 3-Line SPI mode. Data is latched at the rising edge of SCLK. And the DDRAM column address pointer will be increased by one automatically. (1) Set Page and Column Address. ...
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... ST7528 IIC Interface (PS0 = "L", PS1 = "L", PS2= "H") The IIC interface receives and executes the commands sent via the IIC Interface. It also receives RAM data and sends it to the RAM. The IIC Interface is for bi-directional, two-line communication between different ICs or modules. The two lines are a Serial Data line (SDA) and a Serial Clock line (SCL) ...
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... ST7528 SDA SCL SDA SCL S START condition Figure 4 Definition of START and STOP conditions DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER SCL FROM MASTER START condition Figure 5 Acknowledgement on the 2-line Interface Ver2.3 data line change stable; of data data valid allowed Figure 3 Bit transfer not acknowledge www ...
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... RAM at the address specified by the data pointer. The data pointer is automatically updated and the data is directed to the intended ST7528 device. If the A0 bit of the last control byte is set to logic 0, these command bytes will be decoded and the setting of the device will be changed according to the received commands ...
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... ST7528 Busy Flag The Busy Flag indicates whether the ST7528 is operating or not. When DB7 is "H" in read status operation, this device is in busy status and will accept only read status instruction. If the cycle time is correct, the microprocessor needs not to check this flag before each instruction, which improves the MPU performance. ...
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... ST7528 DISPLAY DATA RAM (DDRAM) When Mode 0 is selected The Display Data RAM stores pixel data for the LCD 129-row (17 pages by 8 bits) by 132-column addressable array. Each pixel can be selected when the page and column addresses are specified. The 129 rows are divided into 16 pages of 8 lines and the 17th page with a single line (DB0 only) ...
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... ST7528 Column Address Circuit In Mode 0, 1 Column Address Circuit has a 10-bit preset counter that provides Column Address to the Display Data RAM. When set Column Address MSB / LSB instruction is issued, 8-bit [Y9:Y2] are set and lowest 2 bit, Y[1:0] is set to “00”. Since this address is increased by 1 each a read or write data instruction, microprocessor can access the display data continuously. ...
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... ST7528 MODE 1 SEG SEG SEG output 0 1 Column address 00H 01H [Y9:Y2] Internal column address [Y9:Y0] Display data (ADC=0) LCD panel display Display data (ADC=1) LCD panel display Figure 10 ...
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... ST7528 ST7528 Mode-0 Display RAM Mapping diagram Page Address Data ...
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... ST7528 ST7528 Mode-1 Display RAM Mapping diagram Page Address Data ...
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... FRC (Frame Rate Control) and PWM (Pulse Width Modulation) Function Circuit The ST7528 incorporates an FRC function and a PWM function circuit to display a 16-level gray scale. The FRC function and PWM utilize liquid crystal characteristics whose transmittance is changed by an effective value of applied voltage. The ST7528 provides palette-registers to assign the desired gray level ...
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... ST7528 -Gray Scale Table of 45 PWM (Pulse Width Modulation) Dec Hex 6-bits 0 00 000000 1 01 000001 2 02 000010 3 03 000011 4 04 000100 … … … … … … … … … … … … 101010 43 2B 101011 44 2C 101100 45 2D 101101 … ...
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... ST7528 Display Timing Generator Circuit This circuit generates some signals to be used for displaying LCD. The display clock, CL (internal), generated by oscillation clock, generates the clock for the line counter and the signal for the display data latch. The line address of on-chip RAM is generated in synchronization with the display clock and the display data latch circuit latches the128-bit display data in synchronization with the display clock ...
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... ST7528 LCD DRIVER CIRCUIT This driver circuit is configured by 129-channel common drivers and 160-channel segment drivers. This LCD panel driver voltage depends on the combination of display data and M signal. COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 ...
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... ST7528 Partial Display on LCD The ST7528 realizes the Partial Display function on LCD with low-ratio driving for saving power consumption and showing the various display ratio. To show the various display ratio on LCD, LCD driving ratio and bias are programmable via the instruction. And, built-in power supply circuits are controlled by the instruction for adjusting the LCD driving voltages. ...
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... ST7528 Figure 15 Moving Display (Partial Display ratio=16,Initial COM0=8) Ver2.3 www.DataSheet.co.kr 38/97 -COM0 -COM1 -COM2 -COM3 -COM4 -COM5 -COM6 -COM7 -COM8 -COM9 -COM10 -COM11 -COM12 -COM13 -COM14 -COM15 -COM16 -COM17 -COM18 -COM19 -COM20 -COM21 -COM22 -COM23 2007/1/3 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... ST7528 POWER SUPPLY CIRCUITS The Power Supply circuits generate the voltage levels necessary to drive liquid crystal driver circuits with low power consumption and the fewest components. There are voltage converter circuits, voltage regulator circuits, and voltage follower circuits. They are controlled by power control instruction. For details, refers to "Instruction Description". Table 4 shows the referenced combinations in using Power Supply circuits ...
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... ST7528 Voltage Converter Circuits These circuits boost up the electric potential between VDD2 and Vss times toward positive side and boosted voltage is outputted from VOUT pin possible to select the lower boosting level in any boosting circuit by “Set DC-DC Step-up” instruction. When the higher level is selected by instruction, VOUT voltage is not valid. ...
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... ST7528 In Case of Using Internal Resistors, Ra and Rb (INTRS = "H”) When INTRS pin is "H", resistor Ra is connected internally between VR pin and VSS, and Rb is connected between V0 and VR. We determine V0 by two instructions, "Regulator Resistor Select" and "Set Reference Voltage". Table 6 Internal Ratio depending on 3-bit Data (R2 R1 R0) ...
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... ST7528 In Case of Using External Resistors, Ra and Rb (INTRS = "L") When INTRS pin is "L" necessary to connect external regulator resistor Ra between VR and VSS, and Rb between V0 and VR. Example: For the following requirements 1. LCD driver voltage 10V 2. 6-bit reference voltage register = ( ...
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... ST7528 Bias Power Save circuit: When we set the Instruction of Bias Power Save, the bias also could be working, and the IC current consumption will be lower about 100uA to 200uA (according to the panel loading) Follower voltage reference circuit (Internal Booster & Regulator) V SS2 VSS C1 V OUT ...
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... ST7528 Booster Efficiency By Booster Stages (3X, 4X, 5X, 6X) and Booster Efficiency (Level1~2) commands, we could easily set the best Booster performance with suitable current consumption. If the Booster Efficiency is set to higher level (level2 is higher than level1), The Boost Efficiency is better than lower level, and it just need few more power consumption current. It could be applied to each multiple voltage Condition ...
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... ST7528 RESET CIRCUIT Setting RESETB to “L” or Reset instruction can initialize internal function. When RESETB becomes “L”, following procedure is occurred. Page address: 0 Column address: 0 Read-modify-write: OFF Display ON / OFF: OFF Initial display line: 0 (first) Initial COM0 register: 0 (COM0) Partial display ratio: 1/128 ...
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... ST7528 Instruction A0 RW EXT Mode Set 0 0 EXT=0 Read display data 1 1 Write display data 1 0 Read status 0 1 ICON control register ON/OFF 0 0 Set page address 0 0 Set column address MSB 0 0 Set column address LSB 0 0 Set modify-read ...
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... ST7528 Instruction A0 RW Ext=0 Power control 0 0 Select DC-DC step- Select regulator register 0 0 Select electronic volumn 0 0 register 0 0 Select LCD bias Set Bias Power Save Mode 0 0 Release Bias Power Save 0 0 Mode 0 0 SHL select 0 0 ADC select ...
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... ST7528 ST7528 Instruction A0 RW EXT=1 st Set white mode and 1 frame set pulse width Set white mode and 2 frame set pulse width Set white mode and 3 frame set pulse width Set white mode and 4 frame set pulse width ...
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... Booster Efficiency The ST7528 incorporates software configurable Booster Efficiency Command. It could be used with Voltage multiplier to get the suitable Vout and Power consumption. Default setting is Level 2 Flag Description 0 Booster Efficiency Level Booster Efficiency Level 2 Mode Set Flag ...
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... ST7528 Read Display Data 8-bit data from Display Data RAM specified by the column address and page address can be read by this instruction. As the column address is increased by 1 automatically after each this instruction, the microprocessor can continuously read data from the addressed page. A dummy read is required after loading an address into the column address register. ...
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... ST7528 Read Status Indicates the internal status of the ST7528 A0 RW DB7 DB6 0 1 BUSY ON Flag Description BUSY The device is busy when internal operation or reset. Any instruction is rejected until BUSY goes Low. 0: chip is active, 1: chip is being busy ON Indicates display ON / OFF status 0: display OFF, 1: display ON RESET Indicates the initialization is in progress by RESET signal ...
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... ST7528 Set Page Address Sets the Page Address of display data RAM from the microprocessor into the page address register. Any RAM data bit can be accessed when its Page Address and column address are specified. Along with the column address, the Page Address defines the address of the display RAM to write or read display data. Changing the Page Address doesn't affect the display status. Set Page Address instruction can not be used to set the page address to “ ...
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... ST7528 Set Modify-Read This instruction stops the automatic increment of the column address by the read display data instruction, but the column address is still increased by the write display data instruction. And it reduces the load of microprocessor when the data of a specific area is repeatedly changed during cursor blinking or others. This mode is canceled by the reset Modify-Read instruction ...
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... ST7528 Display ON / OFF Turns the display ON or OFF. This command has priority over Entire Display On/Off and Reverse Display On/Off. Commands are accepted while the display is off, but the visual state of the display does not change DB7 DON = 1: display ON ...
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... ST7528 Set Initial COM0 Register Sets the initial row (COM) of the LCD panel using the 2-byte instruction. By using this instruction possible to realize the window moving without the change of display data. The 1st Instruction A0 RW DB7 The 2nd Instruction A0 RW ...
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... ST7528 Select partial display line Sets the ratio within range 128 (ICON disabled 129 (ICON enabled) to realize partial display by using the 2-byte instruction. The 1st Instruction A0 RW DB7 The 2 Instruction DB7 ...
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... ST7528 Set N-line Inversion Register Sets the inverted line number within range improve the display quality by controlling the phase of the internal LCD AC signal (M) by using the 2-byte instruction. The DC-bias problem could be occurred even number. So, we recommend customers to set odd number ...
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... ST7528 Release N-line Inversion Returns to the frame inversion condition from the n-line inversion condition DB7 Reverse Display ON / OFF Reverses the display status on LCD panel without rewriting the contents of the display data RAM DB7 REV White 0 (normal) White (“0000”) 1 (reverse) Dark (“ ...
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... ST7528 Set Bias Power Save Mode Consist of 2-byte Instructions The 1 Instruction DB7 The 2 Instruction DB7 This command is for saving the IC current consumption by Bias Power Saving After this Instruction is set, Bias function is also working Release Bias Power Save Mode ...
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... ST7528 Select Regulator Resistor Selects resistance ratio of the internal resistor used in the internal voltage regulator. See voltage regulator section in power supply circuit. Refer to the Table DB7 Set Electronic Volume Register Consist of 2-byte Instructions The 1st instruction set Reference Voltage mode, the 2nd one updates the contents of reference voltage register. ...
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... ST7528 Figure 24 Sequence For Setting the Electronic Volume Select LCD Bias Selects LCD bias ratio of the voltage required for driving the LCD DB7 SHL Select COM output scanning direction is selected by this instruction which determines the LCD driver output status. ...
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... This instruction enables the built-in oscillator circuit DB7 Power Save The ST7528 enters the Power Save status to reduce the power consumption to the static power consumption value and returns to the normal operation status by the following instructions. Set Power Save Mode A0 RW DB7 0 0 ...
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... ST7528 Reset This instruction Resets initial display line, column address, page address, and common output status select to their initial status, but dose not affect the contents of display data RAM. This instruction cannot initialize the LCD power supply, which is initialized by the RESETB pin. ...
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... ST7528 The 2 Instruction: Set Display Data Length (DDL) Register DB7 NOP No operation A0 RW DB7 Ver2.3 DB6 DB5 DB4 DB3 D6 D5 ...
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... ST7528 Test Instruction This instruction is for testing IC. Please do not use it DB7 Set FRC & PWM mode Selects 3/4 FRC and PWM FRC 0 1 NOTE: the value of register could not set [PWM1:PWM0]=[1:1] Set Gray Scale Mode & Register Consists of 2 bytes instruction. The first byte sets grayscale mode and the second byte updates the contents of gray scale register without issuing any other instruction ...
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... ST7528 --Set Gray Scale Register A0 RW DB7 GAX5 GAX4 GAX3 Ver2.3 DB6 DB5 DB4 DB3 X GAX5 GAX4 GAX3 GAX2 ...
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... ST7528 COMMAND DESCRIPTION Referential Instruction Setup Flow: Initializing with the built-in Power Supply Circuits Power ON(VDD-VSS) Keeping the /RES Pin="L" Figure 26 Initializing with the Built-in Power Supply Circuits Ver2.3 User System Setup by External Pins Start of Initialization Waiting for Stabilizing the Power /RES Pin=" ...
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... ST7528 Referential Instruction Setup Flow: Initializing without the built-in Power Supply Circuits Power ON(VDD-VSS) Keeping the /RES Pin="L" Figure 27 Initializing without Built-in Power Supply Circuits Ver2.3 User System Setup by External Pins Start of Initialization Waiting for Stabilizing the Power /RES Pin="H" ...
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... ST7528 Referential Instruction Setup Flow: Data Displaying Referential Instruction Setup Flow: Power OFF Ver2.3 End of Initialization Display Data RAM Addressing by Instruction [Initial Display Line] [Set Page Address] [Set Column Address] Write Display Data by Instruction [Display Data Write] Turn Display ON/OFF Instruction ...
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... VEXT 2.0 ~ 3.3 V0 3.5~15 VOUT_IN –0.5 ~ +20 V1, V2, V3, V4 0.3 to VOUT_IN VIN –0.5 to VDD+0.5 VO –0.5 to VDD+0.5 TOPR –30 to +85 TSTR –65 to +150 www.DataSheet.co. ST7528 chip side 70/97 Unit °C °C V LCD 2007/1/3 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... ST7528 DC CHARACTERISTICS 3.3V 3.0 to 13.0V LCD Item Symbol Condition Operating Voltage (1) VDD Operating Voltage (2) VDD2 High-level Input Voltage VIHC Low-level Input Voltage VILC High-level Output Voltage VOHC Low-level Output Voltage VOLC Input leakage current ILI Output leakage current ILO ...
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... ST7528 Bare Dice Consumption Current : During Display, with the Internal Power Supply, Current consumed by total ICs when an external power supply(VDD,VDD2) is used . Test pattern Symbol Display Pattern ISS SNOW Power Down ISS Notes to the DC characteristics 1. The maximum possible V voltage that may be generated is dependent on voltage, temperature and (display) load. ...
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... ST7528 TIMING CHARACTERISTICS System Bus Read/Write Characteristics 1 (For the 8080 Series MPU AW8 / WR, (Write (Read) Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) ...
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... ST7528 Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) Enable H pulse width (READ) WRITE Data setup time WRITE Data hold time READ access time READ Output disable time ...
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... ST7528 System Bus Read/Write Characteristics 1 (For the 6800 Series MPU) A0 R/W t AW6 CS1 (CS2="1" (Write (Read) Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) ...
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... ST7528 Item Address hold time Address setup time System cycle time Enable L pulse width (WRITE) Enable H pulse width (WRITE) Enable L pulse width (READ) Enable H pulse width (READ) WRITE Data setup time WRITE Data hold time READ access time READ Output disable time ...
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... ST7528 SERIAL INTERFACE (4-Line Interface) /CS1 (CS2="1") A0 SCL Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time ...
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... ST7528 Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time *1 The input signal rise and fall time (tr, tf) are specified less. ...
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... ST7528 Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Data setup time Data hold time CS-SCL time CS-SCL time Item Serial Clock Period SCL “H” pulse width SCL “L” pulse width Data setup time ...
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... ST7528 SERIAL INTERFACE(IIC Interface) SDA t BUF SCL SDA Item SCL clock frequency SCL clock low period SCL clock high period Data set-up time Data hold time SCL,SDA rise time SCL,SDA fall time Capacitive load represented by each bus line Setup time for a repeated START condition ...
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... ST7528 RESET TIMING /RES Internal status Item Signal Reset time Reset “L” pulse width RESB Item Signal Reset time Reset “L” pulse width RESB Item Signal Reset time Reset “L” pulse width RESB Ver2 During reset ...
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... ST7528 POWER PAD CONNECT The pinning of the ST7528 is optimized for single plane wiring e.g. for chip-on-glass display modules. Display size: 160 X 100 pixels or 132 X 128 pixels. COM *6 if external oscillator Figure 35 Application diagram: internal charge pump is used and s single V COM *6 if external oscillator Figure 36 Application diagram: Internal charge pump is used and two separate Ver2 ...
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... ST7528 COM *6 if external oscillator Figure 37 application diagram : External high voltage generation is used The required minimum value for the external capacitors in an application with the ST7528 are min. 100nF C = min. 1.0 μF VLCD VDD,2 Higher capacitor values are recommended for ripple reduction. ...
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... The ST7528 Series can be connected to either60X86 Series MPUs or to 6800Series MPUs. Moreover, using the serial interface it is possible to operate the ST7528 series chips with fewer signal lines. The display area can be enlarged by using multiple ST7528 Series chips. When this is done, the chip select signal can be used to select the individual ICs to access. ...
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... ST7528 (4) Using the Serial Interface (3-line interface CS1 Port 1 Port 2 RES GND (5) Using the Serial Interface (IIC interface Port 1 Port 2 RES GND Ver2.3 V CS1 SI SCL /RES V SS RESET SDA SCL /RES RESET 85/ ...
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... A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Ver2.3 16-Gray programming example for ST7528 DISPLAY 0 0 x’ DC1 DC0 0 1 www.DataSheet.co. x’ x’ ...
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... ST7528 7 A0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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... ST7528(Use IIC Interface) SETP SERIAL BUS BYTE 1 IIC INTERFACE Start DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 2 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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... ST7528 x’ x’ Ev5 Ev4 Ev3 Ev2 Ev1 Ev0 6.d DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 7.a DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 7.b SET pulse width of Gray scale 7 ...
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... ST7528 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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... ST7528 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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... ST7528 ST7528 APPICATION NOTE ST7528 Internal analog circuit Mode 0, Resolution : 129(128COM+ICON)*132(SEG) Interface:8080 series OSC1:External for input (the same pin shoud be connected together, for example,pin246(D0) connect to pin247(D0) exclude power pin) ................ ................ 1 COM30 31 COM0 32 COMS1 33 SEG0 163 SEG130 164 SEG131 165 COM64 ................ ...
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... ST7528 ST7528 Internal analog circuit Mode1: Resolution : 101(100COM+ICON)*160(SEG) Interface : 4 SPI OSC1:External for input (the same pin shoud be connected together, for example,pin246(D0) connect to pin247(D0) exclude power pin) ................ ................ 1 COM16 17 COM0 18 COMS1 19 SEG0 177 SEG158 178 SEG159 179 COM50 ................ 196 COM67 ................ Ver2.3 VR:OPEN ...
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... ST7528 ST7528 Internal analog circuit Mode1: Resolution : 101(100COM+ICON)*160(SEG) Interface : 3 SPI OSC1:External for input (the same pin shoud be connected together, for example,pin246(D0) connect to pin247(D0) exclude power pin) ................ ................ 1 COM16 17 COM0 18 COMS1 19 SEG0 177 SEG158 178 SEG159 179 COM50 ................ 196 COM67 ................ Ver2.3 VR:OPEN ...
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... ST7528 ST7528 Internal analog circuit Mode0, Resolution : 129(128COM+ICON)*132(SEG) Interface : I2C OSC1:External for input (the same pin shoud be connected together, for example,pin246(D0) connect to pin247(D0) exclude power pin) SA[1:0]:VDD OR VSS=(0,0) (SA[1:0] are Slave address of I2C) ................ ................ 1 COM30 31 COM0 32 COMS1 33 SEG0 163 SEG130 164 SEG131 ...
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... ST7528 ST7528 Internal analog circuit Mode1: Resolution : 101(100COM+ICON)*160(SEG) Interface : 8080 interface OSC1:External for input External VOUT from VOUT_IN (the same pin shoud be connected together, for example,pin246(D0) connect to pin247(D0) exclude power pin) ................ ................ 1 COM16 17 COM0 18 COMS1 19 SEG0 177 SEG158 178 SEG159 179 COM50 ...
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... ST7528 1.5V 2004/6/29 80,68,IIC Timing character definition 1.6V 2004/7/21 Modify Application Note VDD, VSS routing 1.7V 2004/10/12 Add Timing parameter , tF and tR Modify Vout Max limitation from 15V to 18V l 1.8V 2004/11/26 Add VEXT using range (2.0V~3.3V) l Modify Frame rate frequency typical and Max/Min value. l Modify 3FRC/4FRC setting description (page 33). ...