TSC87C51 TEMIC Semiconductors, TSC87C51 Datasheet
TSC87C51
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TSC87C51 Summary of contents
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... DC, without loss of data. The TSC87C51 retains all the features of the 80C51 with some enhancement bytes of internal code memory (EPROM); 128 bytes of internal data memory (RAM); 32 I/O lines; two 16 bit timers; a 5-source, 2-level interrupt structure ...
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... TSC87C51 Block Diagram Figure 1 TSC87C51 Block diagram 2 EPROM – Rev. E July 03, 2000 ...
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... CDIL P3.1/TxD 11 30 P3.2/INT0 12 29 P3.3/INT1 13 28 P3.4/ P3.5/ P3.6/ P3.7/ XTAL2 18 23 XTAL1 19 22 VSS 20 21 Figure 2 TSC87C51 pin configuration Do not connect Reserved pins. – Rev. E July 03, 2000 VCC P0.0 7 P1.5 P0.1 8 P1.6 P0.2 9 P1.7 P0.3 10 RST P0.4 11 P3.0/RxD P0.5 12 Reserved P0.6 13 P3.1/TxD P0.7 14 P3.2/INT0 EA/VPP 15 P3 ...
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... TSC87C51 Pin Description VSS Circuit ground potential. VSS1 Secondary ground (not on DIP). Provided to reduce ground bounce and improve power supply by–passing. Note: This pin is not a substitute for the VSS pin. Connection is not necessary for proper operation. VCC Supply voltage during normal, Idle, and Power Down operation. ...
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... Alternate Function RxD (serial input port) TxD (serial output port) INT0 (external interrupt 0) INT1 (external interrupt 1) T0 (Timer 0 external input) T1 (Timer 1 external input) WR (external Data Memory write strobe) RD (external Data Memory read strobe) . The port pins will be driven to their reset CC TSC87C51 5 ...
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... Pull ALE low while the device is in reset (RST high) and PSEN is high. D Hold ALE low as RST is deactivated. While the TSC87C51 is in ONCE mode, an emulator or test CPU can be used to drive the circuit. Table 2 shows the status of the port pins during ONCE mode. Normal operation is restored when normal reset is applied. ...
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... Clear to restore ALE operation during internal fetches. The reset value of MSCON is XXXX XXX0b. UART The UART in the TSC87C51 operates identically to the UART in the 80C51 but includes the following enhancement. For a complete understanding of the TSC87C51 UART please refer to the description in the 80C51 Hardware Description Guide. ...
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... TSC87C51 SM0/FE SM1 SMOD1 SMOD0 Figure 3 Framing error block diagram RXD Start bit RI SMOD0=X FE SMOD0=1 Figure 4 Enhanced UART timing diagram in mode 1 RXD Start bit RI SMOD0=0 RI SMOD0=1 FE SMOD0=1 Figure 5 Enhanced UART timing diagram in mode 2 and 3 Table 4 SCON – Serial Control Register (98h) ...
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... Set by hardware at the end of the 8th bit time in mode the beginning of the stop bit in the other modes. Clear to acknowledge interrupt. RI Receive Interrupt Flag Set by hardware at the end of the 8th bit time in mode 0, see Figure 4 and Figure 5 in the other modes. Clear to acknowledge interrupt. The reset value of SCON is 0000 0000b. – Rev. E July 03, 2000 TSC87C51 9 ...
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... This will ensure program protection. EPROM Programming Set–up modes In order to program and verify the EPROM or to read the signature bytes, the TSC87C51 is placed in specific set–up modes (see Figure 6). Control and program signals must be held at the levels indicated in Table 5. ...
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... Verify algorithm Code array verify must be done after each byte or block of bytes is programmed. In either case, a complete verify of the programmed array will ensure reliable programming of the TSC87C51. To verify the TSC87C51 code the following sequence must be exercised : D Step 1: Activate the combination of program signals. ...
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... If an application subjects the device to this type of exposure suggested that an opaque label be placed over the window. 12 Read/Verify Cycle Data In Data Out 100us 10us Contents 58h Customer selection byte: TEMIC 58h Family selection byte: C51 9Eh TSC87C51 XXh Product revision number 2 rating for 30 minutes distance of Comment – Rev. E July 03, 2000 ...
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... Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . – Rev. E July 03, 2000 TSC87C51 Notice tresses at or above those listed under “ Absolute Maximum Rat- ings” may cause permanent damage to the device. This is a stress rat- ing only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... TSC87C51 DC Parameters for Standard Voltage, commercial, industrial and military temperature range T = – +125 C; VSS = 0V; VCC = 5V 10 MHz. A Symbol Parameter VIL Input Low Voltage VIH Input High Voltage except XTAL1, RST VIH1 Input High Voltage, XTAL1, RST (6) VOL Output Low Voltage, ports ...
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... VCC VCC P0 RST EA (NC) XTAL2 CLOCK XTAL1 SIGNAL VSS All other pins are disconnected. Figure 9 ICC Test Condition, Idle Mode – Rev. E July 03, 2000 TSC87C51 VCC ICC VCC VCC P0 RST EA (NC) XTAL2 XTAL1 VSS All other pins are disconnected. ...
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... TSC87C51 AC Parameters Explanation of the AC Symbols Each timing symbol has 5 characters. The first character is always a “T” (stands for time). The other characters, depending on their positions, stand for the name of a signal or the logical status of that signal. The following is a list of all the characters and what they stand for. ...
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... TCLCL–50 7TCLCL–150 TCLCL–50 0 TCLCL–40 TCLCL+40 TLLWL TWLWH TQVWX TLLAX TQVWH A0–A7 DATA OUT TAVWL ADDRESS A8–A15 OR SFR P2 TSC87C51 25 MHz Units Min Max 210 ns ns 210 ns 170 290 ns 320 ns 130 ...
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... TSC87C51 External Data Memory Read Cycle ALE PSEN RD PORT 0 A0–A7 ADDRESS PORT 2 OR SFR–P2 Serial Port Timing – Shift Register Mode Symbol Parameter TXLXL Serial port clock cycle time TQVHX Output data set–up to clock rising edge TXHQX Output data hold after clock ...
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... Rev. E July 03, 2000 Min 12 TCLCL 48 TCLCL 48 TCLCL 48 TCLCL 48 TCLCL VERIFICATION ADDRESS ADDRESS DATA OUT DATA IN TGHDX 5 TGHAX Pulses TGHSL TGHGL VPP VCC TELQV TSC87C51 Max Units MHz s s 110 s 48 TCLCL 48 TCLCL 48 TCLCL s TAVQV TEHQZ 19 ...
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... TSC87C51 External Clock Drive Characteristics (XTAL1) Symbol Parameter TCLCL Oscillator Period TCHCX High Time TCLCX Low Time TCLCH Rise Time TCHCL Fall Time External Clock Drive Waveforms VCC–0.5V 0.7VCC 0.2VCC–0.1 0.45V TCHCL AC Testing Input/Output Waveforms VCC –0.5 V INPUT/OUTPUT 0. inputs during testing are driven at VCC – 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are made at VIH min for a logic “ ...
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... P2 THESE SIGNALS ARE NOT ACTIVATED DURING THE EXECUTION OF A MOVX INSTRUCTION DATA PCL OUT SAMPLED FLOAT DATA SAMPLED FLOAT DATA OUT OLD DATA NEW DATA TSC87C51 STATE4 STATE5 DATA PCL OUT SAMPLED FLOAT PCL OUT (IF PROGRAM MEMORY IS EXTERNAL) PCL OUT (EVEN IF PROGRAM ...
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... TSC87C51 Ordering Information TSC 87C51 –25 –25: 25 MHz version Part Number 87C51: Programmable ROM TEMIC Semiconductors Microcontroller Product Line * The Standart Microcircuit Drawing 5962–87684 must be used as the reference for QML–Q procurement OTP Packaging G: CDIL 40 (.6) I: CQPJ 44 EPROM–UV Erasable ...